A Computer-Aided Design Methodology for Application-Specific Embedded Processors

专用嵌入式处理器的计算机辅助设计方法

• 批准号: 9612632
• 负责人: Srini Devadas
• 金额: $ 33万
• 依托单位: Massachusetts Institute of Technology
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1996
• 资助国家: 美国
• 起止时间: 1996-11-15 至 1999-10-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9612632&HistoricalAwards=false
• 关键词: Computer; Aided; Design; Methodology; Application

Advances in technology have made it possible to integrate a processor core, a program ROM, and application-specific circuitry all on a single IC. Thus, high-level language compilers are essential tools for overcoming complexity in embedded system design. This research is on development of a retargetable compiler framework that can generate optimized code for a variety of processor architectures. The approach includes development of a machine description language to describe a wide range of processor architectures. Further tasks include: building a retargetable code generator and optimizer, and a simulator for the compiled code to obtain performance metrics. Very general code optimization algorithms that are parameterizable with respect to the number of functional units, registers, and the topology of interconnect between them are being explored. The developed algorithms are being integrated into a framework for machine-dependent code generation and optimization.

技术的进步使得将处理器内核、程序ROM和专用电路全部集成在单个IC上成为可能。 因此，高级语言编译器是克服嵌入式系统设计复杂性的重要工具。 这项研究旨在开发一个可重定向的编译器框架，该框架可以为各种处理器架构生成优化的代码。 该方法包括开发一种机器描述语言来描述各种各样的处理器架构。 进一步的任务包括：构建一个可重定向的代码生成器和优化器，以及一个用于编译代码的模拟器，以获得性能指标。 正在探索非常通用的代码优化算法，这些算法可以根据功能单元、寄存器和它们之间的互连拓扑的数量进行参数化。 所开发的算法被集成到一个框架中，用于机器相关的代码生成和优化。