KArlsruhe's Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array (Kahrisma) Architecture

由于下一代应用程序的不同处理行为和不可预测的运行时特征，未来的嵌入式设备在应用传统设计风格时可能不再有效地执行，例如，当设计在设计时为特定场景或应用领域量身定制时。我们坚信，关键的设计决策不能再固定/确定在设计时。这就产生了对灵活响应运行时场景的创新处理器体系结构的需求。因此，我们提出了一种新的多粒度自适应硬件架构，通过并行处理不同指令集架构（isa）的能力，将粗粒度和细粒度的可重构结构紧密集成在一起。需要一个灵活的软件框架来利用这些新特性。不同的isa需要一个可重新定位的编译框架（基于架构描述语言），而自动多粒度自定义指令检测将为我们的多粒度可重新配置硬件加速器提供优化的实现。此外，考虑到性能和功率限制，需要一个自适应运行时系统在不同的应用程序和线程之间有效地分配可用的硬件资源。我们相信我们的新概念将为未来的自适应嵌入式处理提供一个有希望的范例，目标是下一代应用。

Due to the diverse processing behavior and non-predictable run-time characteristics of the next generation applications future embedded devices may no longer perform efficiently when applying traditional design styles, e.g. when a design is tailor made at design time for a specific scenario or application domain. We strongly believe that crucial design decisions can no longer be fixed/determined at design time. This begets the demand for an innovative processor architecture reacting flexibly to runtime scenarios. Therefore, we propose a novel multi-grained adaptable hardware architecture, tightly integrating coarse and fine-grained reconfigurable fabrics extended by the capability to handle different Instruction Set Architectures (ISAs) in parallel. A flexible software framework is needed to make use of these novel features. Different ISAs require a retargetable compilation framework (based on an Architecture Description Language) while automatic multi-grained Custom Instruction detection will deliver optimized implementations for our multi-grained reconfigurable hardware accelerators. Additionally, an adaptive run-time system is required to efficiently distribute the available hardware resources between different applications and threads considering performance and power constraints. We believe that our novel concept will provide a promising paradigm for future adaptive embedded processing, targeting next generation applications.