权益分类	功能权益	普通用户	{{item.name}}会员
{{category.name}}	{{benefitItem.name}}

Dynamic Redundancy for Many-core Systems

多核系统的动态冗余

基本信息

批准号：
337312426
负责人：
Professor Dr.-Ing. Jürgen Becker
金额：
--
依托单位：
Institut für Technik der Informationsverarbeitung (ITIV)
依托单位国家：
德国
项目类别：
Research Grants
财政年份：
2017
资助国家：
德国
起止时间：
2016-12-31 至 2021-12-31
项目状态：
已结题

来源：
https://gepris.dfg.de/gepris/projekt/337312426?language=en
关键词：
Dynamic Redundancy Many core Systems

项目摘要

Safety-critical systems require redundancy for fault-detection and fault-tolerance. Depending on the application mode or execution state, different types of redundancy are required: Dual Modular Redundancy (DMR) for fail-safe modes and Triple Modular Redundancy (TMR) or even higher redundancy for fail-operational modes. Future safety-critical systems will feature mode switching between application of different criticality and fault-tolerance demands requiring more dynamicity in redundancy modes. An example in automotive may be switching from parking assistant to piloted driving with much higher safety demands, but executed on the same embedded multi-core. This project investigates the dynamic switching between redundancy modes depending on external causes. We call this dynamic redundancy. We investigate dynamic redundancy switching between hardware modes (no redundancy, DMR, and TMR), same for software modes and combinations. Our target hardware platforms are tile-based Multi-Processor Systems on Chips (MPSoCs) that are enhanced by fault-tolerant hardware to reach an Adaptively Redundant Processor. Dynamic redundancy switching is controlled by a Redundancy Management Unit per tile and a Network-on-Chip (NoC) managed redundancy enhancement that enables scalable designs by introducing NoC voting capabilities.On the software side we start with an actor-based data-flow execution model, which is able to execute tasks, called dataflow actors, depending on input data availability in parallel. Such a model is common in current parallel programming environments as e.g. the task model in OpenMP. We enhance the dataflow actor model to run actors redundantly to reach DMR or TMR modes. Dataflow actors can be easily re-executed in case of failure because of their freedom from side effects. We investigate dynamic redundancy switching between software and hardware modes as well as timing behavior and real-time schedulability in case of failures.To perform the evaluations, we develop a cross-layer system architecture, called Adaptively Redundant Many-core Architecture (ARMA), incorporating dynamic redundancy on software and hardware levels. ARMA is intended to combine high performance parallel execution with safety mechanisms like fault tolerance and timing predictability to cover the different requirements of a broad range of embedded domains, like automotive, avionic, and space. The dynamic redundancy switching concept shall be proven on a FPGA-based ARMA multi-core processor, yet the insights gained and techniques developed in this project shall be applicable to future MPSoC architectures in general.

安全关键型系统需要冗余来进行故障检测和容错。根据应用程序模式或执行状态，需要不同类型的冗余：用于故障安全模式的双模块冗余（DMR）和用于故障操作模式的三模块冗余（TMR）甚至更高的冗余。未来的安全关键系统将在不同关键性和容错需求的应用之间进行模式切换，这要求冗余模式具有更大的动态性。汽车领域的一个例子是从停车辅助切换到安全性要求更高的驾驶员驾驶，但在同一个嵌入式多核上执行。本项目研究冗余模式之间的动态切换取决于外部原因。我们称之为动态冗余。我们研究了硬件模式（无冗余，DMR和TMR）之间的动态冗余切换，软件模式和组合也是如此。我们的目标硬件平台是基于瓦片的多处理器片上系统（MPSoC），通过容错硬件增强，以达到自适应冗余处理器。动态冗余切换由每个瓦片的冗余管理单元和片上网络（NoC）管理的冗余增强来控制，该增强通过引入NoC投票功能来实现可扩展的设计。在软件方面，我们从基于参与者的数据流执行模型开始，该模型能够根据输入数据的可用性并行执行任务，称为低参与者。这样的模型在当前并行编程环境中是常见的，例如在OpenMP中的任务模型。我们增强了低层演员模型，以冗余方式运行演员，从而达到DMR或TMR模式。数据流参与者可以在失败的情况下轻松重新执行，因为它们没有副作用。我们研究了软件和硬件模式之间的动态冗余切换以及故障情况下的时序行为和实时可扩展性，为了进行评估，我们开发了一个跨层的系统架构，称为自适应冗余众核架构（阿尔马），将动态冗余的软件和硬件级别。阿尔马旨在将联合收割机高性能并行执行与容错和时序可预测性等安全机制相结合，以满足汽车、航空电子和空间等广泛嵌入式领域的不同需求。动态冗余切换概念将在基于FPGA的阿尔马多核处理器上得到验证，但在本项目中获得的见解和开发的技术将适用于未来的MPSoC架构。

项目成果

期刊论文数量（3）

专著数量（0）

科研奖励数量（0）

会议论文数量（0）

专利数量（0）

An Adaptive Lockstep Architecture for Mixed-Criticality Systems

混合关键系统的自适应锁步架构

DOI：
10.1109/isvlsi51109.2021.00013
发表时间：
2021
期刊：
2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
影响因子：
0
作者：
Fabian Kempf;Thomas Hartmann;Steﬀen Baehr;Juergen Becker
通讯作者：
Juergen Becker

A Functional Programming Model for Embedded Dataflow Applications

嵌入式数据流应用程序的函数式编程模型

DOI：
10.1109/compsac.2019.10281
发表时间：
2019
期刊：
2019 IEEE 43rd Annual Computer Software and Applications Conference (COMPSAC)
影响因子：
0
作者：
Christoph Kühbacher;Christian Mellwig;Florian Haas;Theo Ungerer
通讯作者：
Theo Ungerer

A Network on Chip Adapter for Real-Time and Safety-Critical Applications

适用于实时和安全关键型应用的片上网络适配器