New Generation Multithreaded Multiprocessors
新一代多线程多处理器
基本信息
- 批准号:9707125
- 负责人:
- 金额:$ 40万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Continuing Grant
- 财政年份:1997
- 资助国家:美国
- 起止时间:1997-07-15 至 2001-06-30
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
This project is experimenting with languages, compilers, and architectures for large-scale multiprocessors based on functional programming and single assignment data structures. The project includes work at USC on translators for functional languages, and work at the University of Delaware on architectures and simulations. The key insight motivating the work is that functional programming can increase performance of multithreaded systems. One increase of performance comes from the ability to move threads among processors. Another is the possibility that single assignment data structures can be cached with no need for coherence traffic, potentially increasing performance of parallel systems. Research will include development of a program execution model and memory model, design of a cache management protocol for single-assignment data structures, translation of benchmarks such as SPLASH 2 into a functional language, and simulation of the benchmarks running on the new execution model with cache protocol. The goal is to measure the extent to which the new models and cache protocols provide a performance advantage over execution models that permit multiple assignments. This project is experimenting with languages, compilers, and architectures for large-scale multiprocessors based on functional programming and single assignment data structures. The project includes work at USC on translators for functional languages, and work at the University of Delaware on architectures and simulations. The key insight motivating the work is that functional programming can increase performance of multithreaded systems. One increase of performance comes from the ability to move threads among processors. Another is the possibility that single assignment data structures can be cached with no need for coherence traffic, potentially increasing performance of parallel systems. Research will include development of a program execution model and memory model, design of a cache management protocol for single-assignment data structures, translation of benchmarks such as SPLASH 2 into a functional language, and simulation of the benchmarks running on the new execution model with cache protocol. The goal is to measure the extent to which the new models and cache protocols provide a performance advantage over execution models that permit multiple assignments.
这个项目是基于函数式编程和单赋值数据结构的大规模多处理器的语言、编译器和体系结构的实验。 该项目包括在南加州大学的函数式语言翻译工作,以及在特拉华州大学的架构和模拟工作。 激励这项工作的关键见解是函数式编程可以提高多线程系统的性能。 性能的提高之一来自于在处理器之间移动线程的能力。 另一种可能性是单个分配数据结构可以被缓存而不需要一致性流量,从而潜在地提高并行系统的性能。 研究将包括开发一个程序执行模型和内存模型,为单任务数据结构设计一个高速缓存管理协议,将SPLASH 2等基准转换为功能语言,以及模拟在新的执行模型上运行的基准。 我们的目标是衡量新模型和缓存协议在多大程度上提供了性能优势,超过允许多个分配的执行模型。 这个项目是基于函数式编程和单赋值数据结构的大规模多处理器的语言、编译器和体系结构的实验。 该项目包括在南加州大学的函数式语言翻译工作,以及在特拉华州大学的架构和模拟工作。 激励这项工作的关键见解是函数式编程可以提高多线程系统的性能。 性能的提高之一来自于在处理器之间移动线程的能力。 另一种可能性是单个分配数据结构可以被缓存而不需要一致性流量,从而潜在地提高并行系统的性能。 研究将包括开发一个程序执行模型和内存模型,为单任务数据结构设计一个高速缓存管理协议,将SPLASH 2等基准转换为功能语言,以及模拟在新的执行模型上运行的基准。 我们的目标是衡量新模型和缓存协议在多大程度上提供了性能优势,超过允许多个分配的执行模型。
项目成果
期刊论文数量(0)
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会议论文数量(0)
专利数量(0)
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Jean-Luc Gaudiot其他文献
Space-and-Time Efficient Parallel Garbage Collector for Data-Intensive Applications
- DOI:
10.1007/s10766-010-0151-4 - 发表时间:
2010-10-01 - 期刊:
- 影响因子:0.900
- 作者:
Shaoshan Liu;Ligang Wang;Xiao-Feng Li;Jean-Luc Gaudiot - 通讯作者:
Jean-Luc Gaudiot
Guest Editorial: SBAC-PAD 2013
客座社论:SBAC-PAD 2013
- DOI:
10.1007/s10766-015-0377-2 - 发表时间:
2015-09-09 - 期刊:
- 影响因子:0.900
- 作者:
Guido Araujo;Jean-Luc Gaudiot;Manish Parashar;Derek Chiou;José Nelson Amaral;Chita R. Das - 通讯作者:
Chita R. Das
Intelligent Page Migration on Heterogeneous Memory by Using Transformer
- DOI:
10.1007/s10766-024-00776-x - 发表时间:
2024-09-12 - 期刊:
- 影响因子:0.900
- 作者:
Songwen Pei;Wei Qin;Jianan Li;Junhao Tan;Jie Tang;Jean-Luc Gaudiot - 通讯作者:
Jean-Luc Gaudiot
Exploiting locality and tolerating remote memory access latency using thread migration
- DOI:
10.1007/bf02699904 - 发表时间:
1997-08-01 - 期刊:
- 影响因子:0.900
- 作者:
Stephen Jenks;Jean-Luc Gaudiot - 通讯作者:
Jean-Luc Gaudiot
Value Prediction and Speculative Execution on GPU
- DOI:
10.1007/s10766-010-0155-0 - 发表时间:
2010-12-01 - 期刊:
- 影响因子:0.900
- 作者:
Shaoshan Liu;Christine Eisenbeis;Jean-Luc Gaudiot - 通讯作者:
Jean-Luc Gaudiot
Jean-Luc Gaudiot的其他文献
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{{ truncateString('Jean-Luc Gaudiot', 18)}}的其他基金
SaTC: CORE: Small: Securing information systems with flexible hardware techniques
SaTC:核心:小型:利用灵活的硬件技术保护信息系统
- 批准号:
2026675 - 财政年份:2020
- 资助金额:
$ 40万 - 项目类别:
Standard Grant
SHF:Medium:Collaborative Research:Fine-Grain Multithreading through Hardware/Software Co-Design
SHF:中:协作研究:通过硬件/软件协同设计的细粒度多线程
- 批准号:
1763793 - 财政年份:2018
- 资助金额:
$ 40万 - 项目类别:
Continuing Grant
XPS: FULL: CCA: Collaborative Research: SPARTA: a Stream-based Processor And Run-Time Architecture
XPS:完整:CCA:协作研究:SPARTA:基于流的处理器和运行时架构
- 批准号:
1439165 - 财政年份:2014
- 资助金额:
$ 40万 - 项目类别:
Standard Grant
SHF: MEDIUM: Collaborative Research: Architecture, Programmability and Performance of Large Scale Parallel Systems
SHF:中:协作研究:大规模并行系统的体系结构、可编程性和性能
- 批准号:
1065147 - 财政年份:2011
- 资助金额:
$ 40万 - 项目类别:
Continuing Grant
Collaborative Research: A Programmable, Efficient, and Dynamic Architecture and Compilation Framework for Networking Applications
协作研究:用于网络应用的可编程、高效、动态的架构和编译框架
- 批准号:
0541403 - 财政年份:2005
- 资助金额:
$ 40万 - 项目类别:
Continuing Grant
Multithreading: A Viable Approach for High Performance Single Chip Architecture
多线程:高性能单芯片架构的可行方法
- 批准号:
0234444 - 财政年份:2002
- 资助金额:
$ 40万 - 项目类别:
Continuing Grant
U.S.-France Cooperative Research (INRIA): A Viable Trade-off between Instruction-Level Parallelism (ILP) and Thread-Level Parallelism (TLP)
美法合作研究 (INRIA):指令级并行性 (ILP) 和线程级并行性 (TLP) 之间的可行权衡
- 批准号:
0223647 - 财政年份:2002
- 资助金额:
$ 40万 - 项目类别:
Standard Grant
Multithreading: A Viable Approach for High Performance Single Chip Architecture
多线程:高性能单芯片架构的可行方法
- 批准号:
0073527 - 财政年份:2000
- 资助金额:
$ 40万 - 项目类别:
Continuing Grant
U.S.-France Cooperative Research (INRIA): A Viable Trade-off between Instruction-Level Parallelism (ILP) and Thread-Level Parallelism (TLP)
美法合作研究 (INRIA):指令级并行性 (ILP) 和线程级并行性 (TLP) 之间的可行权衡
- 批准号:
9815742 - 财政年份:1999
- 资助金额:
$ 40万 - 项目类别:
Standard Grant
U.S.- France Cooperative Research (INRIA): Formal Specification and Transformation of Parallel Programs
美法合作研究(INRIA):并行程序的正式规范和转换
- 批准号:
9602937 - 财政年份:1997
- 资助金额:
$ 40万 - 项目类别:
Standard Grant
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