Noise Tolerant DSP for the Deep Submicron Era

深亚微米时代的耐噪声 DSP

• 批准号: 9902745
• 负责人: Naresh Shanbhag
• 金额: $ 31.4万
• 依托单位: University of Illinois at Urbana-Champaign
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1999
• 资助国家: 美国
• 起止时间: 1999-10-01 至 2000-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9902745&HistoricalAwards=false
• 关键词: Noise; Tolerant; DSP; Deep; Submicron

Advances in multimedia digital signal processing (DSP), wireless communication systems, integrated circuit technology and portability requirements have fuelled research into the design of energy-efficient deep submicron (DSM) systems. Noise has emerged as a problem of significance for design in the DSM regime. This research addresses the dual challenge of designing reliable and energy-efficient DSP systems in the presence of DSM noise. Three coupled approaches are being explored: 1) algorithmic noise-tolerance (ANT) that employs stochastic signal processing techniques to combat DSM noise, 2) noise-tolerant dynamic circuit design techniques that provide noise-immunity with minimal energy penalty and 3) a CAD methodology that optimally folds the results of 1) and 2) in order to achieve a specified degree of system reliability and energy-efficiency.

多媒体数字信号处理 (DSP)、无线通信系统、集成电路技术和便携性要求的进步推动了对节能深亚微米 (DSM) 系统设计的研究。噪声已成为 DSM 体系中设计的一个重要问题。这项研究解决了在存在 DSM 噪声的情况下设计可靠且节能的 DSP 系统的双重挑战。正在探索三种耦合方法：1) 算法噪声容限 (ANT)，采用随机信号处理技术来对抗 DSM 噪声；2) 噪声容限动态电路设计技术，以最小的能量损失提供噪声抗扰度；3) CAD 方法，最佳地折叠 1) 和 2) 的结果，以实现指定程度的系统可靠性和能效。