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Noise Tolerant DSP for the Deep Submicron Era

Noise Tolerant DSP for the Deep Submicron Era
深亚微米时代的耐噪声 DSP
批准号:
0000987
负责人:
Naresh Shanbhag
金额:
$31.4万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
1999
资助国家:
美国
项目状态:
已结题
起止时间:
1999-10-01 至 2003-09-30

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中文摘要
翻译
多媒体数字信号处理(DSP)、无线通信系统、集成电路技术和便携性要求的进步推动了对节能深亚微米(DSM)系统设计的研究。在DSM制度下,噪声已经成为设计的一个重要问题。这项研究解决了在存在DSM噪声的情况下设计可靠和节能的DSP系统的双重挑战。正在探索三种耦合的方法:1)使用随机信号处理技术来对抗DSM噪声的算法噪声容限(ANT),2)以最小的能量损失提供噪声免疫的噪声容限动态电路设计技术,以及3)优化地合并1)和2)的结果的CAD方法,以便实现指定程度的系统可靠性和能效。
英文摘要
Advances in multimedia digital signal processing (DSP), wireless communication systems, integrated circuit technology and portability requirements have fuelled research into the design of energy-efficient deep submicron (DSM) systems. Noise has emerged as a problem of significance for design in the DSM regime. This research addresses the dual challenge of designing reliable and energy-efficient DSP systems in the presence of DSM noise. Three coupled approaches are being explored: 1) algorithmic noise-tolerance (ANT) that employs stochastic signal processing techniques to combat DSM noise, 2) noise-tolerant dynamic circuit design techniques that provide noise-immunity with minimal energy penalty and 3) a CAD methodology that optimally folds the results of 1) and 2) in order to achieve a specified degree of system reliability and energy-efficiency.
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