ITR: Adaptive Information Processing through Precomputation
ITR:通过预计算进行自适应信息处理
基本信息
- 批准号:0082876
- 负责人:
- 金额:$ 49.5万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Continuing Grant
- 财政年份:2000
- 资助国家:美国
- 起止时间:2000-09-01 至 2005-08-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Future information appliances are expected to become increasingly mobile and operate under highly fluctuating workloads, thus imposing stringent design constraints on their energy dissipation, size, cost, performance, and quality of service. This project explores algorithmic and design automatin technologies for creating computing systems that dynamically adapt their operation to their workloads with the objective to maximize thieir energy efficiency and resource utilization. In the area of algorithms, research is conducted on the design and analysis of precomputation schemes that can be used to predict the load of a computation in the future and adapt system resources accordingly. In the area of design automation, the project is concerned with behavioral-level transformations and scheduling algorithms that rely on precomputation to generate energy-efficient hardware or software implementations of general computations.
未来的信息设备预计将变得越来越移动,并在高度波动的工作负载下运行,从而对其能耗、尺寸、成本、性能和服务质量施加严格的设计约束。该项目探索算法和设计自动化技术,用于创建动态调整其操作以适应其工作负载的计算系统,目标是最大限度地提高其能源效率和资源利用率。在算法方面,研究了预计算方案的设计和分析,预计算方案可用于预测未来的计算负荷并相应地调整系统资源。在设计自动化领域,该项目关注行为级转换和调度算法,这些算法依赖于预计算来生成通用计算的节能硬件或软件实现。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Marios Papaefthymiou其他文献
Efficient Block Scheduling to Minimize Context Switching Time for Programmable Embedded Processors
- DOI:
10.1023/a:1008921705476 - 发表时间:
1999-10-01 - 期刊:
- 影响因子:0.900
- 作者:
Inki Hong;Miodrag Potkonjak;Marios Papaefthymiou - 通讯作者:
Marios Papaefthymiou
Marios Papaefthymiou的其他文献
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{{ truncateString('Marios Papaefthymiou', 18)}}的其他基金
SHF: Small: Hardware-Level Security to Side-Channel Analysis Attacks
SHF:小型:针对侧通道分析攻击的硬件级安全性
- 批准号:
1816069 - 财政年份:2018
- 资助金额:
$ 49.5万 - 项目类别:
Standard Grant
SHF: Small: Energy-Recycling VLSI Systems
SHF:小型:能量回收 VLSI 系统
- 批准号:
0916714 - 财政年份:2009
- 资助金额:
$ 49.5万 - 项目类别:
Standard Grant
SGER: Design Technologies for Nanoscale VLSI
SGER:纳米级 VLSI 设计技术
- 批准号:
0739623 - 财政年份:2007
- 资助金额:
$ 49.5万 - 项目类别:
Standard Grant
CAREER: Parallel Integer Programming for Architectural-LevelVLSI Design
职业:架构级 VLSI 设计的并行整数规划
- 批准号:
9796145 - 财政年份:1997
- 资助金额:
$ 49.5万 - 项目类别:
Continuing Grant
Synchronous VLSI Circuit Optimization via Integrated Retiming and Clock Skew Scheduling
通过集成重定时和时钟偏差调度实现同步 VLSI 电路优化
- 批准号:
9610108 - 财政年份:1997
- 资助金额:
$ 49.5万 - 项目类别:
Continuing Grant
CAREER: Parallel Integer Programming for Architectural-LevelVLSI Design
职业:架构级 VLSI 设计的并行整数规划
- 批准号:
9624587 - 财政年份:1996
- 资助金额:
$ 49.5万 - 项目类别:
Continuing Grant
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