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CAREER: Parallel Integer Programming for Architectural-LevelVLSI Design

CAREER: Parallel Integer Programming for Architectural-LevelVLSI Design
职业:架构级 VLSI 设计的并行整数规划
批准号:
9624587
负责人:
Marios Papaefthymiou
金额:
$10.0万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
1996
资助国家:
美国
项目状态:
已结题
起止时间:
1996-02-15 至 1998-01-31

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中文摘要
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英文摘要
The research component of this project will result in the design and development of portable parallel software for solving architectural-level optimization problems that arise in the design of VLSI systems. Several of these problems can be formulated as very large scale integer programs that can be solved in polynomial time using iterative relaxation techniques. The practical running times of these algorithms on serial computers can be prohibitively long, however, especially for interactive design environments. The scaleable parallel software developed in this project will be able to execute orders of magnitude faster than conventional serial code. It will thus enable VLSI designers to interactively explore their design space at an early stage in the design process and to efficiently consider several architectural alternatives before committing to any particular implementation. The educational part of this project aims at the seamless integration of parallel computation in the undergraduate and graduate curriculum. To that effect, two new courses will be developed at Yale. The first course will introduce undergraduates to the basics of serial and parallel computer systems organization. The second course will cover algorithms for computer-aided design of VLSI systems with a research focus on parallel electronic design automation. ***
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FuSe-TG: Regaining the Edge
  • 批准号:
    2235472
  • 项目类别:
    Standard Grant
  • 资助金额:
    $45.0万
  • 财政年份:
    2023
  • 负责人:
    Marios Papaefthymiou
  • 依托单位:
SHF: Small: Hardware-Level Security to Side-Channel Analysis Attacks
  • 批准号:
    1816069
  • 项目类别:
    Standard Grant
  • 资助金额:
    $45.0万
  • 财政年份:
    2018
  • 负责人:
    Marios Papaefthymiou
  • 依托单位:
SHF:Small:Deca-GHz CMOS
SHF: Small: Energy-Recycling VLSI Systems
国内基金
海外基金
强流低能加速器束流损失机理的Parallel PIC/MCC算法与实现