SGER: Application of Communication-Theoretic Principles to Nano Interconnect Research

互连已被公认为纳米技术中的十大难题之一。该项目的一个基本观察是，纳米互连问题与现实世界中的通信非常相似。为了保证在噪声和随机环境下的可靠、快速和安全通信，已经进行了大量的研究。因此，该研究正在利用通信理论原理和开发创新的信令概念来解决纳米互连的随机性。主要重点是CMOS中的纳米硅技术，特征尺寸低于100 nm，目标是探索如何在噪声和随机限制的纳米互连环境中实现可靠和快速的信号传输。具体目标是1。为各种纳米互连网络开发现实而简单的通信模型，2.为了研究由通信理论规定的基本信令限制（可实现速率的估计指示高达Tbits/sec），3.为了证明用于纳米信令的互连设计技术，其可以潜在地接近理论信令极限。这通过若干创新的组合而成为可能，这些创新包括（i）多线（差分）全双工信令，（ii）信号调制、编码和均衡，以及（iii）利用而不是避免诸如用于潜在信令的波传输的极深亚微米（VDSM）效应。

Interconnect has been recognized one of ten hardest problems in nano technologies. A basic observation underlying this project is that nano-interconnect issues are much similar to that in real-world communication. Much research has been conducted to ensure the reliable, fast and secure communication over a noisy and stochastic environment. Therefore, the research is exploiting communication-theoretic principles and developing innovative signaling concepts in solving the stochastic nature of nano interconnect. The primary focus is on nano silicon technologies in CMOS with feature sizes below 100nm, and the goal is to explore ways to achieve reliable and fast signaling over the noisy and stochastically limited nano-interconnect environment. The specific objectives are1. to develop realistic-yet-simple communication models for various nano interconnect scenarios,2. To study fundamental signaling limits dictated by communication theory (estimates of achievable rates indicate up to Tbits/sec.),3. to demonstrate interconnect design techniques for nano-signaling that can potentially approach the theoretical signaling limitsThis is being made possible by a combination of several innovations that include (i) multi-wire (differential) full-duplex signaling, (ii) signal modulation, coding and equalization, and (iii) utilization, instead of avoiding, very-deep-submicron (VDSM) effects such as wave transmission for potential signaling.