SGER: Bridging Nanoelectronics to CMOS

SGER：连接纳米电子学和 CMOS

• 批准号: 0407734
• 负责人: Gregory Snider
• 金额: $ 6万
• 依托单位: University of Notre Dame
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2004
• 资助国家: 美国
• 起止时间: 2004-03-01 至 2006-02-28
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0407734&HistoricalAwards=false
• 关键词: SGER; Bridging; Nanoelectronics; CMOS

As the scaling of CMOS nears its end it becomes imperative to a device paradigm that can carry forward device integration to ever-higher densities. The most daunting challenge facing the industry in the scaling of CMOS is power density. This is seen in the rapid increase in the total power dissipated by ICs, and even more ominously in the power per unit area. An attractive route to continue progress in devices is to develop a paradigm where the energy required is orders of magnitude lower than that possible in CMOS. A nanoelectronics paradigm called quantum-dot cellular automata (QCA) holds this promise, where by using quasi-adiabatic clocking the switching energy can be below kT. In addition clocked QCA cells can provide true power gain for logic level restoration. While nanoelectronics is perhaps the key technology for the future of electronics, it should be recognized that CMOS will have a place in systems long after the end of scaling, and implementations of nanoelectronics will necessarily need to interface with CMOS. CMOS has a tremendous number of advantages which can exploited, and the extensive CMOS infrastructure should be leveraged to make the smoothest possible transition to the nanoelectronic paradigm. For example, clocking and interfacing to the outside world would be handled by CMOS circuitry, while computation tasks would be handled by the low-power nanoelectronic circuitry. Combinations of nanoelectronics and CMOS will be an excellent way to implement electronic systems. The proposed project will explore the issues of interfacing nanoelectronics and CMOS.

随着 CMOS 的微缩化接近尾声，能够将器件集成度提升到更高密度的器件范式变得势在必行。业界在 CMOS 微缩方面面临的最艰巨的挑战是功率密度。从 IC 总功耗的快速增加就可以看出这一点，更糟糕的是单位面积的功耗。器件持续进步的一个有吸引力的途径是开发一种范例，其中所需的能量比 CMOS 中可能的能量低几个数量级。一种称为量子点元胞自动机 (QCA) 的纳米电子学范式实现了这一前景，通过使用准绝热时钟，开关能量可以低于 kT。此外，时钟 QCA 单元可以为逻辑电平恢复提供真正的功率增益。虽然纳米电子学可能是未来电子学的关键技术，但应该认识到，在微缩技术结束后很长一段时间内，CMOS 将在系统中占有一席之地，并且纳米电子学的实现必然需要与 CMOS 接口。 CMOS 具有大量可以利用的优势，并且应该利用广泛的 CMOS 基础设施来尽可能顺利地过渡到纳米电子范式。例如，时钟和与外界的接口将由 CMOS 电路处理，而计算任务将由低功耗纳米电子电路处理。纳米电子学和 CMOS 的结合将是实现电子系统的绝佳方法。拟议的项目将探讨纳米电子学和 CMOS 的接口问题。