Achieving High-Performance Reconfigurable Computing in Commodity Devices
Achieving High-Performance Reconfigurable Computing in Commodity Devices
批准号:
0426147
负责人:
Scott Hauck
金额:
$32.5万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2004
资助国家:
美国
项目状态:
已结题
起止时间:
2004-11-01 至 2008-10-31
中文摘要
在商品设备中实现高性能可重构计算摘要现场可编程门阵列是一种可以编程和重新编程的芯片,可以实现复杂的数字逻辑。它们将硬件的性能与软件的灵活性结合在一起。潜在的应用范围从用于高性能计算机的硬件加速器,以及日常电子设备。尽管现场可编程门阵列可以为广泛的应用提供高性能,但它们实现的时钟周期通常比其他电路慢5倍-10倍。这是由于底层硬件的可编程特性以及输入电路的限制。与目前实际实现的时钟速率相比,FPGA可以支持更高的理论时钟速率。这项研究将开发实现这一潜力所需的架构功能和工具。这种方法将现有的技术与新的算法相结合,用于生成和映射高度流水线电路。关键是在需要的情况下允许非常重要的电路流水线,同时以面积换取性能。我们还将优化现场可编程门阵列架构以支持流水线,同时不会对通用设计造成不利影响。这将包括支持激进流水线的优化逻辑块,以及为互连流水线设计的布线。这项提议包含了从根本上提高现场可编程门阵列速度的新方法,现场可编程门阵列是当今电子系统中的主要构建块。通过提供更快的硬件,我们可以在许多不同的系统中提供更大的灵活性、功能和速度。这可能包括具有可重新配置硬件单元的高端计算机,以及多网络、多服务手机和增强型多媒体PDA等多功能电子产品。
英文摘要
Achieving High-Performance Reconfigurable Computing in Commodity DevicesAbstractFPGAs are chips that can be programmed and reprogrammed to implement complex digital logic. They combine the performance of hardware with the flexibility of software. Potential applications range from hardware accelerators for high-performance computers, as well as in everyday electronic devices. Thus, improving their performance is of significant interest.Although FPGAs can provide high performance for a wide range of applications, their achieved clock cycles are typically 5x-10x slower than other circuits. This is due to the programmable nature of the underlying hardware, as well as the limitations in the input circuits.FPGAs can support much higher theoretical clock rates than currently can be achieved in practice. This research will develop architectural features and tools needed to realize this potential. This approach will combine established techniques with new algorithms for generating and mapping highly pipelined circuits. The key is to allow for very significant levels of circuit pipelining in situations that demand it, while trading area for performance.We will also optimize the FPGA architectures to support pipelining, while not adversely affecting general-purpose designs. This will include optimized logic blocks that can support aggressive pipelining, as well as routing designed for interconnect pipelining.This proposal contains new approaches to radically increase the speed of FPGAs, a major building block in today's electronics systems. By providing faster hardware, we can provide greater flexibility, capabilities, and speed in many different systems. This may include high-end computers with reconfigurable hardware units, and versatile electronics like multi-network, multi-service cell phones and enhanced multi-media capable PDAs.
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会议论文
SHF: Small: CGRAs - Control and Architecture for Next-Generation FPGAs
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批准号:1116248
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项目类别:Standard Grant
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资助金额:$45.0万
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财政年份:2011
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负责人:Scott Hauck
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依托单位:
CISE Research Infrastructure: An Infrastructure for Integrated Systems Education and Innovation
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批准号:0101254
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项目类别:Standard Grant
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资助金额:$87.25万
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财政年份:2001
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负责人:Scott Hauck
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依托单位:
CAREER: A Logic Emulation Infrastructure for Research and Teaching
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批准号:9996404
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项目类别:Standard Grant
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资助金额:$24.0万
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财政年份:1999
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负责人:Scott Hauck
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依托单位:
CAREER: A Logic Emulation Infrastructure for Research and Teaching
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批准号:9875564
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项目类别:Standard Grant
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资助金额:$0.0万
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财政年份:1999
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负责人:Scott Hauck
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依托单位:
海外基金