NER/SNB: Implementing Nano-scale, Hierarchical, Distributed Memories with CMOL (Cmos / MOLecular) Circuits

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Abstract:Proposal no: 508533Title: NER/SNB Implementing Nano-scale, Hierarchical, Distributed Memories with CMOL (Cmos / MOLecular) CircuitsPI: Dan Hammerstrom, Co-PI: Jack McCarthyInst: BME Department, OGI School of Science and Engineering Oregon Health & Science UniversityThe project examines the creation of biologically inspired circuit models in a hybrid CMOS / Molecular circuit technology. This research is based on two key assumptions, (1) that sparse, hierarchical, distributed data memories (HDMs) will be an important component of Intelligent Signal Processing, and (2) that the mapping of these models to molecular scale circuitry will be more effective than the mapping of more traditional computation.The HDMs form the primary objective of the overall research program. As computational models, they have very different characteristics from traditional models. They rely more on parallel computation than on raw speed. They are asynchronous and of low precision. And they are fault tolerant. For these reasons molecular scale electronics appear to be a promising computational substrate for these models. To develop HDM technology, we are focusing on a number of important problems:1) Developing network models that demonstrate hierarchical data invariance and abstractions with distributed representations;2) Adding temporal information to the representation;3) Building software systems of multiple HDM components with complementary functional diversity into complex "cognitive" systems;4) Scaling to large networks;5) Studying hardware acceleration;6) Integrating HDMs with existing intelligent computing technologies, in particular digital signal processing and rule-based systems; and7) Applying HDM technology to real world applications.The research performed here focuses on potential hardware acceleration with hybrid micro/nanotechnology. In particular, we will be looking at a hybrid CMOS / Molecular technology, CMOL, and the CrossNet implementation architecture, which are being developed at SUNY Stony Brook by Prof. Likharev and is group.The basic idea of CMOL circuits is to combine the advantages of the currently dominant CMOS technology (including its flexibility and high fabrication yield) with those of single-electron molecular devices with nanometer-scale footprint. The devices would be self-assembled on a pre-fabricated nanowire array fabric, enabling very high function density at acceptable fabrication cost. The CMOL technology seems to be uniquely suited for the implementation of the distributed-crossbar ("CrossNet") family of neuromorphic networks which may allow a very effective implementation of HDMs.