Investigation of Semiconductors Under Extreme Strain for High Strain Nanoscale Piezoresistive Sensors and Next Generation CMOS

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The objective of this research to investigate the common transduction physics of micromachined piezoresistive sensors and state-of-the-art strained semiconductor complementary metal-oxide-semiconductor (CMOS) technology. The approach is to experimentally investigate piezoresistance in p- and n-type silicon and germanium at much higher stresses ( 1 GPa) than previously characterized, to explore the fundamental contributions to piezoresistivity at these high stresses, and to elucidate electrical reliability tradeoffs under these extreme conditions. Successful completion of the research objectives will provide fundamental understanding of the mechanisms of mobility enhancement in nano-scale devices at high stresses where stress-dependent scattering and quantum confinement affect the carrier transport and will identify stress limits above which leakage, tunneling, and 1/f noise become detrimental. An imminent need exists for more precise modeling and better understanding of piezoresistance in sensors and strained semiconductors. Such understanding may facilitate a new era of convergence of high precision sensors and nano-scale CMOS system on chip. A guiding principle for the education plan is to integrate research into continuing education for K-12 teachers who are at the frontline for preparing future scientists and engineers to succeed at universities and contribute to society. In collaboration with the stakeholders including the student faculty advisory committee, teachers, and administration, best practices will be investigated for establishing workable interactions between time-constrained teachers and staff. It is hoped that the convergence between precision sensors and nanoscale CMOS will provide an inspiring vehicle for sparking interest among students and teachers.