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CAREER: Processors for the Computation of Future Digital Signal Processing Applications

CAREER: Processors for the Computation of Future Digital Signal Processing Applications
职业:用于未来数字信号处理应用计算的处理器
批准号:
0546907
负责人:
Bevan Baas
金额:
$40.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2006
资助国家:
美国
项目状态:
已结题
起止时间:
2006-07-01 至 2014-06-30

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Abstract0546907Bevan BaasU of California - DavisCAREER: Processors for the Computation of Future Digital Signal Processing ApplicationsApplications requiring significant levels of Digital Signal Processing (DSP) are becoming increasingly commonplace examples include GPS receivers, Wi-Fi wireless networking, 3D medical imaging, and cell phones. As these applications become increasingly sophisticated and more frequently portable, their performance and power dissipation requirements often exceed the capabilities of modern DSP processors. Thegoal of this research is to develop novel architectures, circuits, and software for high performance and low power DSP processors that meet the demands of emerging and future DSP applications, and that are also well-suited to future semiconductor fabrication processes. Research results are introduced into both undergraduate and graduate level courses and other investigators are involved in collaborative efforts. Results of this research are expected to enable new embedded, medical, environmental, and consumer applications.To achieve project goals, the investigators develop DSP systems with features that are new on several levels. First, easily-scalable programmable building block processors with high performance and high energy efficiency are developed using innovative architectures, granularity, clocking, interconnection, and circuits. Second, efficient architectures are developed for shared blocks such as large memory arrays and specialpurpose DSP processors, as well as methods for effectively integrating these blocks into the programmable DSP array. Third, software tools including a compiler and automatic mapping tools are developed to more easily program the system. Fourth, to demonstrate gains in performance and energy efficiency, the system is implemented in silicon, tested, and characterized.
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SHF:Small:Fine-Grain Many-Core Processor Arrays for Efficient Enterprise Computing
  • 批准号:
    1321163
  • 项目类别:
    Standard Grant
  • 资助金额:
    $40.0万
  • 财政年份:
    2013
  • 负责人:
    Bevan Baas
  • 依托单位:
CIF: Small: Efficient Hardware For Complex Communications Processors
  • 批准号:
    1018972
  • 项目类别:
    Standard Grant
  • 资助金额:
    $40.0万
  • 财政年份:
    2010
  • 负责人:
    Bevan Baas
  • 依托单位:
Architectures for Highly-Efficient 1000+ Core Chips for Compute and Data-Intensive Applications
  • 批准号:
    0903549
  • 项目类别:
    Standard Grant
  • 资助金额:
    $31.7万
  • 财政年份:
    2009
  • 负责人:
    Bevan Baas
  • 依托单位:
Architecture, Algorithms, and Circuits for an Energy-Efficient Single-Chip Tera-Op/sec Digital Signal Processor
  • 批准号:
    0430090
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $15.0万
  • 财政年份:
    2004
  • 负责人:
    Bevan Baas
  • 依托单位:
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