SBIR Phase I: Magnetoresistive Device for THz-uW Computing (EOHW7)

这个小型企业创新研究（SBIR）第一阶段项目的重点是进一步开发磁性金属晶体管，这将导致太赫兹-uW处理器和非易失性通用存储器在12个月内。这种晶体管被称为MDEV（磁阻器件），是在该奖项的公司发明的。晶体管采用磁自旋来确定晶体管特性。由于原子和功率密度不会缩放，CMOS缩放会导致不可持续的热水平、性能限制和不断上升的成本。材料创新，如应变硅，高K，双栅，FinFET，CNT（碳纳米管）和自旋电子学仍然局限于实验室或过于昂贵，无法广泛使用。由于MDEV可以仅使用标准CMOS金属化设备在空白硅晶片上构建，因此它可以快速且廉价地商业化。第一个基于MDV的产品是名为M3（金属磁存储器）的通用存储器。M3预计是非易失性的，比SRAM更快，并且具有高密度。因为它具有无限的写耐力，M3适合代码和数据应用程序。该项目的研究目标是：i）优化和表征MDEV结构。ii）创建基于MDEV的存储器（M3）原型。iii）评估这些芯片的存储器性能（例如，写入/读取时间、写入/读取功率）、环境耐受性（例如，高温操作）和工艺良率。当前的半导体增长浪潮是由消费和无线应用中的大众市场电子产品推动的。如果成功，基于MDEV的存储器和处理器将允许设计人员在不增加成本的情况下提高性能（THz）并降低功耗（uW）。MDEV存储器（M3）预计将在价格上与SRAM、NOR和EEPROM竞争，最初的目标是直接取代SRAM、EEPROM和NOR闪存，市场规模合计为120亿美元。这项工作的长期目标是使设计人员能够简化其设计，将多种存储器技术（例如分别用于数据和代码应用的SRAM和NOR Flash）减少到一个通用存储器（M3）。MDEV还将用于构建非常高性能的自适应处理器，该处理器将联合收割机FGPA的灵活性和低NRE与ASIC的高性能、低功耗和低单位成本相结合。

This Small Business Innovation Research (SBIR) Phase I project focuses on further development of magneticmetal transistor that will lead to THz-uW processors and nonvolatile universal memories within 12 month. This transistor, called MDEV (Magnetoresistive Device), was invented at the company working on this award. The transistor employs magnetic spin to determine transistor characteristics. Because atoms and power density do not scale, CMOS scaling is leading to unsustainable thermal levels, performance limits, and escalating cost. Materials innovation such as strained Si, high-K, double gate, FinFET, CNT (Carbon Nano-Tube), and spin-electronics are either still confined to laboratories or too expensive to be widely available. Because MDEV can be built using only standard CMOS metallization equipment on blank silicon wafers, it can be commercialized quickly and cheaply. The first MDEV-based product is a universal memory named M3 (Metal Magnetic Memory). M3 is expected to be Nonvolatile, faster than SRAM, and comes in high density. Because it has unlimited write endurance, M3 is suitable for code and data applications. The research objective of this project is to: i) Optimize and characterize MDEV structures. ii) Create MDEV based memory (M3) prototypes. iii) Evaluate these chips in memory performance (e.g. write/read time, write/read power), environmental endurance (e.g. elevated temperature operations) and process yields. The current wave of semiconductor growth is driven by mass-market electronics in consumer and wireless applications. If successful MDEV based memories and processors will allow designers to improve performance (THz) and reduce power consumption (uW) without cost increases. MDEV memory (M3) is expected to be price competitive with SRAM, NOR and EEPROM today, and is targeted initially as direct replacement for SRAM, EEPROM and NOR Flash, a combined market size of $12B. The long term goal of this effort is to enable designers to simplify their designs in reducing multiple memory technologies (e.g. SRAM and NOR Flash for data and code applications respectively) to one universal memory (M3). MDEV will also be used to build very high performance adaptive processors that combine FGPA's flexibility and low NRE with ASIC's high performance, low power and low unit cost.