CAREER: Introspective Computing: A Multicore Approach to Availability, Reliability and Security

职业：内省计算：可用性、可靠性和安全性的多核方法摘要网络服务器上的网络攻击和远程攻击正成为服务提供商、在线商家和网络用户的巨大担忧。由于缺乏有效和高效的对策和自愈能力，恶意攻击者很容易入侵系统，获得未经授权的访问，破坏服务，导致生产力和收入的巨大损失。为计算系统提供高可用性、可靠性和安全性比以往任何时候都更加迫切地成为一阶设计准则。另一方面，技术扩展已经达到了处理器架构师可以将多个处理器内核集成到同一个芯片上的程度。使用这些具有必要硬件和系统软件支持的多核处理器，可以构建一个内省计算平台来解决这些新出现的问题。内省式多核体系结构利用紧密耦合的片内处理器内核提供的几个优势来执行：细粒度的安全内省、即时低开销检查点和快速的按需回滚恢复，从而在系统受损或损坏时提供持续的服务。内省系统的主要特性包括可编程的非对称处理器内核、防止漏洞利用的物理隔离、高效的细粒度内省和快速检查点/恢复机制。此外，通过实现适当的监视和检测机制，可以以最小的成本启用容错和基于硬件的事务性内存系统。总的来说，它为实现高可用性、可靠性和安全性的挑战提供了一个协同的整体解决方案。这项研究的结果将极大地有利于IT行业、保护其隐私的普通用户，以及在早期设计阶段考虑这些挑战的处理器架构师。

Hsien-Hsin S LeeGeorgia Institute of TechnologyCAREER: Introspective Computing: A Multcore Approach to Availability, Reliability, and Security0644096Panel ID: 070111AbstractCyber exploits and remote attacks on network servers are becoming enormous concerns by service providers, online merchants, and network users. Due to the deficiency of effective and efficient countermeasures and self-healing capability, malicious adversaries can easily compromise systems, gain unauthorized access, and disrupt services, leading to huge loss of productivity and revenues. To provide high availability, reliability and security for computing systems is, more urgent than ever, the first-order design criteria. On the other hand, technology scaling has reached a point where processor architects can integrate multiple processor cores onto the same die. Using such multi-core processors with necessary hardware and system software support, an introspective computing platform can be constructed to addresses these emerging issues. An introspective multi-core architecture leverages several advantages offered by the tightly-coupled on-die processor cores to perform: fine-grained security introspection, instant low-overhead checkpoint, and fast, on-demand rollback recovery, thereby providing a continuing service in the face of system compromise or corruption. The key features of an introspective system include programmable asymmetric processor cores, physical insulation against exploits, highly efficient fine-grained introspection, and fast checkpoint/recovery mechanism. In addition, with adequate monitoring and detection mechanism implemented, fault-tolerance and hardware-based transactional memory system can be enabled for minimal cost. Overall, it provides a synergistic and holistic solution toward the challenges of achieving high availability, reliability, and security. The outcome of this research will substantially benefit the IT industry, the generic users for protecting their privacy, and the processor architects to consider these challenges in the early design phase.