Nanoscale Coded Computation and Storage

纳米级编码计算和存储

• 批准号: 0726602
• 负责人: Andre DeHon
• 金额: $ 20万
• 依托单位: University of Pennsylvania
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2007
• 资助国家: 美国
• 起止时间: 2007-09-01 至 2010-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0726602&HistoricalAwards=false
• 关键词: Nanoscale; Coded; Computation; Storage

A key challenge before the semiconductor industry is coping with high errors rates resulting from the decreasing size of chip features. Transient faults, along with permanent defects and stochastic assembly, make it difficult to implement traditional architectures. Research has been done on routing arounddefects and coping with large amounts of device variation. Little is known, however, about how to cope efficiently with high-rates of transient errors during computation. This research will take a new systematic approach to the tolerance of transient failures. The goal is to help the semiconductor industry to better understand the dimensions of the nanoscale reliability problem. This research has relevance to space-borne applications where error control can serve as an alternative to radiation hardening. This research employs a sophisticated approach to fault-tolerant computation. First, it exploits differential reliability, that is, it examines the use of a small number of reliable elements to oversee a large number ofunreliable elements. Second it draws on the success of coding theory to explore both special and general methods to encode inputs and outputs of a potentially faulty computation, paying particular attention to a seminal approach taken by Spielman in 1996. By encoding computations, faults at the encoded outputs can then be detected and corrected. Third, it examines the use of small check computations followed by possible rollback, where most of the checking is done using unreliable elements. Allowing a computation to berepeated in time, rather than space, reduces the overhead of fault free computations. The design work is expected to have immediate impact on practice whereas development of a general theory is expected to have alonger-term impact.

半导体行业面临的一个关键挑战是应对由于芯片特征尺寸减小而导致的高错误率。瞬态故障，沿着永久性缺陷和随机组装，使得难以实现传统架构。研究已经做了路由arounddefects和应付大量的设备变化。然而，关于如何有效地科普计算过程中的高瞬时错误率，人们知之甚少。这项研究将采取一个新的系统的方法来容忍瞬态故障。其目标是帮助半导体行业更好地理解纳米级可靠性问题的维度。这项研究具有相关的空间应用程序中的错误控制可以作为一种替代辐射硬化。这项研究采用了先进的容错计算方法。首先，它利用差分可靠性，也就是说，它检查使用少量的可靠元素来监督大量的不可靠元素。其次，它借鉴了编码理论的成功，探索特殊和一般的方法来编码输入和输出的一个潜在的错误计算，特别注意到一个开创性的方法，斯皮尔曼在1996年。 通过编码计算，编码输出处的故障然后可以被检测和校正。 第三，它检查了小的检查计算的使用，然后可能回滚，其中大部分检查是使用不可靠的元素。 允许计算在时间上而不是空间上重复，减少了无故障计算的开销。 设计工作预计将对实践产生直接影响，而一般理论的发展预计将产生长期影响。