Collaborative Research: Architecture and Prototype for a Programmable Lab-on-a-Chip

合作研究：可编程片上实验室的架构和原型

• 批准号: 0726694
• 负责人: Stephen Jacobson
• 金额: --
• 依托单位: Indiana University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2007
• 资助国家: 美国
• 起止时间: 2007-09-15 至 2011-02-28
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0726694&HistoricalAwards=false
• 关键词: Collaborative; Research; Architecture; Prototype; Programmable

Lab-on-a-chip (LoC) technology has enabled miniaturization and integration of conventional bench-scale experiments to a single chip comprising on-chip components, such as channels, valves, and mixers. Currently, LoCs are designed as application-specific chips, where a new LoC is designed for every assay by creating and connecting on-chip components to match the steps of the assay. (i.e., n assays need n LoC designs). Unfortunately, this application-specific approach (1) incurs considerable design effort, turn-around time, and cost for each assay and (2) reduces productivity because it requires LoC engineers to know the assay specifics and LoC users to know the constraints of the LoC.To address these limitations, this project will design and prototype a general-purpose, programmable LoC (PLoC) which does not implement any specific assay and instead employs software to translate an assay into an equivalent "executable" which is run on the PLoC. The executable breaks down the assay into a sequence of basic steps called "fluid instructions", which are implemented in hardware. The set of fluid instructions implemented by a PLoC is called its "fluid instruction set", and any assay can be executed on the PLoC if the assay can be translated using the PLoC's fluid instruction set (i.e., n assays use 1 PLoC design instead of requiring n LoC designs). Compared to LoCs, the PLoC has significantly lower design effort and faster turn-around time due to one-time design of a single chip, and lower cost due to economy of volume. The clean separation between hardware and assay achieved by the fluid instruction set and the software translator (called "the fluidic compiler") vastly improves the productivity of LoC users and LoC engineers.

芯片实验室（LoC）技术使传统的实验室规模实验能够小型化并集成到由通道、阀门和混合器等片上组件组成的单个芯片上。目前，LoC被设计为应用特定的芯片，其中通过创建和连接芯片上组件以匹配测定步骤，为每个测定设计新的LoC。(i.e., n个测定需要n个LoC设计）。不幸的是，这种特定于应用的方法（1）为每个测定带来相当大的设计工作量、周转时间和成本，并且（2）降低了生产率，因为它要求LoC工程师了解测定细节，LoC用户了解LoC的约束。为了解决这些限制，该项目将设计和原型化一种通用的，可编程LoC（PLoC），其不实施任何特定测定，而是采用软件将测定翻译成在PLoC上运行的等效“可执行文件”。可执行文件将分析分解为一系列基本步骤，称为“流体指令”，这些步骤在硬件中实现。由PLoC实现的流体指令集被称为其“流体指令集”，并且如果可以使用PLoC的流体指令集来翻译测定，则可以在PLoC上执行任何测定（即，n次测定使用1个PLoC设计，而不需要n个LoC设计）。与LoC相比，PLoC由于单芯片的一次性设计而具有显著更低的设计工作量和更快的周转时间，并且由于体积经济而具有更低的成本。通过流体指令集和软件翻译器（称为“流体编译器”）实现的硬件和分析之间的清晰分离极大地提高了LoC用户和LoC工程师的生产力。