CAREER: Understanding and Exploring Performance-Correctness Explicitly Decoupled Architecture

职业：理解和探索性能正确性显式解耦架构

• 批准号: 0747324
• 负责人: Michael Huang
• 金额: $ 35万
• 依托单位: University of Rochester
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2008
• 资助国家: 美国
• 起止时间: 2008-06-01 至 2014-05-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0747324&HistoricalAwards=false
• 关键词: CAREER; Understanding; Exploring; Performance; Correctness

As processor microarchitecture has evolved over the past 30 years, both the complexity of the design and the number of transistors used in its realization have escalated. This complexity makes guaranteeing correct operation under all corner cases (logical as well as electrical) an ever more challenging task. This, in turn, translates in to higher and higher practical barriers for microarchitectural innovation for performance optimization as correctness is an overriding consideration. The goal of this CAREER proposal is to explore a new design model called Performance-correctness Explicitly-decoupled Architecture. From ground up, an explicitly-decoupled architecture is designed such that performance optimization circuitry is an independent entity separate from the circuitry guaranteeing functionality and correctness. This explicit separation allows performance optimization to be truly considered in a common-case-only manner, allowing the use of probabilistic techniques considered impractical or even incorrect in a conventional monolithic microarchitecture. This project seeks to develop insights to better understand this design model and develop complexity-effective microarchitectural and software mechanisms for performance optimization.

随着处理器微体系结构在过去30年中的发展，设计的复杂性和实现中使用的晶体管数量都在升级。 这种复杂性使保证在所有角案件（逻辑和电气）下保证正确的操作是更具挑战性的任务。反过来，这转化为微体系创新的实用障碍，以进行性能优化，因为正确性是一个压倒性的考虑。这项职业建议的目的是探索一种名为“绩效纠正”的新设计模型，明确地耦合了架构。从头开始，设计了一个明确的构建结构，使得性能优化电路是一个独立的实体，与保证功能和正确性的电路分开。这种明确的分离允许以仅通用案例的方式真正考虑性能优化，从而允许在传统的单片微体系结构中使用被认为是不切实际甚至不正确的概率技术。该项目旨在开发见解，以更好地了解该设计模型，并开发出复杂性有效的微体系和软件机制，以优化性能。