CPA-DA: Robust Performance Characterization in Complex VLSI Design Under Variations

提案编号：811082标题：Variations下复杂VLSI设计中的稳健性能表征PI名称：Dvoodi，Azadeh研究所：威斯康星大学麦迪逊分校摘要：集成电路设计受到纳米级制造工艺缺陷的高度影响。这些缺陷转化为设备及其互连特性的变化。随着技术进一步缩小到45纳米以下的领域，这些变化往往变得更加随机和不那么系统化。关于这些变化，可能只知道部分统计信息，如它们的平均值、方差和范围。此外，根据分层设计流程中的阶段，芯片上组件的可变性中的相关性可能部分已知。在给定这些部分信息的情况下，需要稳健的性能估计以在设计过程中获得更多的可预测性。稳健的预测应该包括与部分可用的可变性数据相匹配的所有情景。PI建议研究两种基于统计和优化的方法对VLSI电路性能进行稳健建模的新应用。PI建议在设计流程的不同阶段调查这些方法对大电路尺寸和大量芯片到芯片和芯片内变化的适用性。成功实施所建议的研究将使设计流程更具可预测性，从而通过缩短设计周期对下一代集成电路的开发做出重大贡献，从而加快产品上市时间。缩短上市时间可以防止主要制造业每月损失5%-10%。此外，PI计划在威斯康星大学麦迪逊分校开设一门研究生水平的课程，这可能会吸引计算机工程专业以外的学生满足他们在中学和辅修领域的要求。这项研究将通过鼓励女性学习计算机工程并将其作为行业或学术界的职业，来推动皮埃尔？S努力增加工程领域的多样性。

Proposal No: 811082Title: Robust Performance Characterization in Complex VLSI Design Under Variations PI name: Davoodi, Azadeh Institution: University of Wisconsin-MadisonABSTRACT:Design of Integrated Circuits is highly impacted by the imperfections of the nano-scale manufacturing process. These imperfections translate into variations in the characteristics of devices and their interconnections. These variations tend to become more random and less systematic as technology further scales down into sub-45nm domain. Only partial statistical information might be known about these variations, such as their average, variance and range. Furthermore, depending on the stage in the hierarchical design flow, correlations in the variability of the components on the chip may be partially known. Given this partial information, robust performance estimation is required to obtain more predictability during the design process. A robust prediction should include all scenarios that match with the partially available variability data. The PI proposes to investigate the novel applications of two statistical and optimization-based approaches for robust modeling of the performance of VLSI circuits. The PI suggests investigating the applicability of these approaches for large circuit sizes and large number of die-to-die and within-die variations at different stages of the design flow.Successful implementation of the proposed research allows a more predictable design flow which can make a significant contribution in the development of next generation Integrated Circuits by shortening design cycles, thereby allowing a faster time-to-market. Reducing the time-to-market can prevent losses of 5-10% magnitude per month in major manufacturing industries. In addition, the PI plans development of a graduate-level course which will likely appeal to the students outside the Computer Engineering area towards meeting their secondary and minor area requirements, at the University of Wisconsin-Madison. This research will catalyze the PI?s efforts to increase the diversity in engineering by encouraging women to study computer engineering and choose it as a career, either at industry or academia.