CPA-DA: Robust Performance Characterization in Complex VLSI Design Under Variations

CPA-DA：复杂 VLSI 设计变化下的稳健性能表征

• 批准号: 0811082
• 负责人: Azadeh Davoodi
• 金额: --
• 依托单位: University of Wisconsin-Madison
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2008
• 资助国家: 美国
• 起止时间: 2008-09-01 至 2011-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0811082&HistoricalAwards=false
• 关键词: CPA; DA; Robust; Performance; Characterization

Proposal No: 811082Title: Robust Performance Characterization in Complex VLSI Design Under Variations PI name: Davoodi, Azadeh Institution: University of Wisconsin-MadisonABSTRACT:Design of Integrated Circuits is highly impacted by the imperfections of the nano-scale manufacturing process. These imperfections translate into variations in the characteristics of devices and their interconnections. These variations tend to become more random and less systematic as technology further scales down into sub-45nm domain. Only partial statistical information might be known about these variations, such as their average, variance and range. Furthermore, depending on the stage in the hierarchical design flow, correlations in the variability of the components on the chip may be partially known. Given this partial information, robust performance estimation is required to obtain more predictability during the design process. A robust prediction should include all scenarios that match with the partially available variability data. The PI proposes to investigate the novel applications of two statistical and optimization-based approaches for robust modeling of the performance of VLSI circuits. The PI suggests investigating the applicability of these approaches for large circuit sizes and large number of die-to-die and within-die variations at different stages of the design flow.Successful implementation of the proposed research allows a more predictable design flow which can make a significant contribution in the development of next generation Integrated Circuits by shortening design cycles, thereby allowing a faster time-to-market. Reducing the time-to-market can prevent losses of 5-10% magnitude per month in major manufacturing industries. In addition, the PI plans development of a graduate-level course which will likely appeal to the students outside the Computer Engineering area towards meeting their secondary and minor area requirements, at the University of Wisconsin-Madison. This research will catalyze the PI?s efforts to increase the diversity in engineering by encouraging women to study computer engineering and choose it as a career, either at industry or academia.

提案编号：811082标题：在复杂的VLSI设计中的鲁棒性能表征变化PI姓名：Davoodi，Azadeh机构：威斯康星大学麦迪逊分校摘要：集成电路的设计是高度的纳米尺度制造工艺的缺陷的影响。这些缺陷转化为器件特性及其互连的变化。随着技术进一步缩小到45纳米以下的领域，这些变化往往变得更加随机和不那么系统化。关于这些变化，可能只知道部分统计信息，例如其平均值、方差和范围。此外，取决于分层设计流程中的阶段，芯片上的组件的可变性的相关性可以是部分已知的。鉴于这部分信息，鲁棒性的性能估计，需要在设计过程中获得更多的可预测性。一个可靠的预测应该包括与部分可用的变异性数据相匹配的所有情景。PI提出了两个统计和优化为基础的方法，强大的VLSI电路的性能建模的新应用。PI建议研究这些方法在设计流程的不同阶段对大电路尺寸和大量管芯到管芯和管芯内变化的适用性。成功实施拟议的研究可以实现更可预测的设计流程，可以通过缩短设计周期，从而为下一代集成电路的开发做出重大贡献，从而加快上市时间。缩短上市时间可以防止主要制造业每月5-10%的损失。此外，PI计划开发一门研究生课程，这可能会吸引计算机工程领域以外的学生，以满足他们在威斯康星大学麦迪逊分校的中学和辅修课程的要求。这项研究将催化PI？我们努力增加工程的多样性，鼓励妇女学习计算机工程，并选择它作为一种职业，无论是在工业界还是学术界。