A New Approach to Design-for-Testability (DFT) Using Ultra Wideband and Wireless Communication Techniques

提案编号：811706PI：HA，DONG S.TITLE：一种使用超宽带和无线通信技术的可测试性设计(DFT)的新方法机构：弗吉尼亚理工学院和州立大学摘要从内部逻辑来看，IC中的配电网络是无处不在的，即任何内部节点都可以访问电力线。这表明，通过将简单且几乎全数字的感测/控制电路连接到节点，可以通过电力线监视或控制任何内部节点的逻辑值。换句话说，IC中的电力线通信(PLC)为设计人员提供了一种访问内部节点的廉价手段，可用于各种应用，包括减少扫描设计的测试应用时间、系统调试、故障诊断、在内置自检期间监控暂态逻辑值以及在线测试。本研究以电路测试为主要目标应用，探讨可编程控制器在集成电路中应用的可行性和实用性。项目实施成功后，取得的主要技术成果如下。(1)提出了一种解决VLSI测试问题的新方法；(2)它研究了一个新的领域，即IC级的PLC；以及(3)它为IC级的PLC开发了必要的构建块。电力线在IC级的使用以前从未被探索过，它在VLSI测试和其他领域，如芯片内/芯片级通信中提供了广泛的新应用。这项研究的结果将发表在期刊和会议记录上，并将在技术会议上展示。这项拟议的研究还将促进研究和教育的整合，并将用于加强皮？S学院的课程。这个项目提供了一个极好的机会来培养不同电气工程领域的本科生和未被充分代表的学生，包括VLSI测试、模拟和混合信号设计、RFIC设计以及电路和系统级仿真。这项拟议研究的初步可行性研究已与美国一家主要半导体公司密切合作进行，其他几家美国半导体公司也承诺在拟议研究中进行合作。在项目成功结束后，与这些公司的密切合作将为研究的商业化提供直接途径。

Proposal No.: 811706PI: Ha, Dong S.Title: A New Approach to Design-for-Testability (DFT) Using Ultra Wideband and Wireless Communication TechniquesInstitution: Virginia Polytechnic Institute and State UniversityABSTRACTA power distribution network in an IC is ubiquitous as seen by the internal logic, i.e., a power line is accessible to any internal node. This suggests the possibility of monitoring or controlling the logic value of any internal node through a power line by attaching a simple and nearly all-digital sensing/control circuit to the node. In other words, power line communications (PLC) in an IC provides designers with an inexpensive means to access to internal nodes, which can be useful for various applications, including test application time reduction for scan design, system debugging, fault diagnosis, monitoring transient logic values during built-in self test, and on-line testing. The research investigates the feasibility and practicality of PLC in ICs with circuit testing as the major target application. Upon successful execution of the project, the major technical accomplishments are as follows. (1) it suggests a new approach to address VLSI testing problems; (2) it investigates a new area, PLC at the IC level; and (3) it develops the necessary building blocks for PLC at the IC level. The use of power lines at the IC level has not been explored before, and it offers vast new applications in VLSI testing and other areas such as intra-/inter- chip level communications.The outcomes of this research will be published in journals and proceedings and will be presented at technical conferences. The proposed research will also foster the integration of research and education and will be used to enhance the curriculum at the PI?s institution. This project provides an excellent opportunity to train undergraduate and underrepresented students in various electrical engineering fields, including VLSI testing, analog and mixed signal design, RFIC design, and circuit and system level simulation. An initial feasibility study for the proposed research has been conducted in close collaboration with a major US semiconductor company, and several other US semiconductor companies also have committed to collaborate in the proposed research. Close collaboration with those companies will provide a direct path to commercialization of the research at the successful conclusion of the project.