Nanoscale and Deterministic Doping of Semiconductors Via Molecular Monolayers

通过单分子层对半导体进行纳米级和确定性掺杂

• 批准号: 0826145
• 负责人: Ali Javey
• 金额: $ 24.33万
• 依托单位: University of California-Berkeley
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2008
• 资助国家: 美国
• 起止时间: 2008-10-01 至 2011-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0826145&HistoricalAwards=false
• 关键词: Nanoscale; Deterministic; Doping; Semiconductors; Via

One of the major challenges towards scaling of the electronic devices to the nanoscale regime is attaining controlled doping of semiconductor materials with atomic accuracy. To overcome this challenge, the PI's group has recently developed a novel surface doping approach based on the self-assembled monolayer formation on the surface of silicon substrates. The purpose of this proposed project is to better understand the fundamental science associated with this doping approach while exploring its feasibility for the fabrication of future nanoelectronics by (i) carefully analyzing the impurity content incorporation, (ii) demonstrating ultrashallow, sub 10-nm junctions by using laser annealing for the diffusion of the dopants, (iii) mapping the dopant diffusion rates and mechanisms, and (iv) extending the process to non silicon substrates, such as gallium arsenide. The proposed project may lead the way for addressing the crucial need for nanoscale doping, and if successful, the monolayer doping method may have a major impact in the nanoelectronics field with the potential of every manufactured transistor and electronic device utilizing this approach. The project will involve the training of one graduate and one undergraduate student. Furthermore, the project will be show cased as part of an open lab on Cal Day, during which students from local high schools will be allowed to tour the PI's lab and learn about the project. The nature of this work and the training of the involved students will be highly interdisciplinary, bridging the fields of chemistry and electrical engineering.

将电子器件缩放到纳米级范围的主要挑战之一是以原子精度实现半导体材料的受控掺杂。为了克服这一挑战，PI的小组最近开发了一种新的表面掺杂方法，该方法基于硅衬底表面上的自组装单层形成。该项目的目的是更好地理解与这种掺杂方法相关的基础科学，同时探索其在未来纳米电子制造中的可行性，方法是（i）仔细分析杂质含量的掺入，（ii）通过使用激光退火扩散掺杂剂来展示超浅，亚10 nm结，（iii）绘制掺杂剂扩散速率和机制，以及（iv）将该工艺扩展到非硅衬底，例如砷化镓。拟议的项目可能会为解决纳米级掺杂的关键需求开辟道路，如果成功，单层掺杂方法可能会对纳米电子领域产生重大影响，每个利用这种方法制造的晶体管和电子设备都有潜力。该项目将培训一名研究生和一名本科生。 此外，该项目将作为Cal Day开放实验室的一部分进行展示，在此期间，当地高中的学生将被允许参观PI的实验室并了解该项目。这项工作的性质和参与学生的培训将是高度跨学科的，连接化学和电气工程领域。