EMT/NANO: Co-Exploration of Device and System Architecture for Quantum NanoElectronics

目标：我们提案的目标是共同探索单个或多个电子纳米级量子器件的模拟和设计，以实现基于二进制决策图的可重构逻辑架构，以实现鲁棒的超低功耗计算系统。该方法基于分栅量子纳米点作为决策节点元素，同时结合了功能可重构性。本研究将主要关注器件架构设计，以证明其在实现具有足够逻辑深度，功能鲁棒性和接近量子极限的能量延迟积的逻辑架构方面的可行性。智力优势：本研究的主要贡献是：1)同时设计和优化纳米级量子器件，以实现系统级逻辑架构，其功耗延迟积接近kT/q*ln的量子极限(2)2)详细的单级和级联器件量子模拟，以促进基于bdd的可重构逻辑电路的设计，以实现可靠的超低功耗运行。提出的研究具有变革性，因为它将扩展我们对基于化合物半导体的纳米器件的物理和操作的基本理解，在新的多栅极配置中，以及节能可重构BDD逻辑架构的设计和实现。更广泛的影响：这项研究的结果将在材料科学、电气工程和计算机工程的交叉领域培育新的方向，将介观器件扩展到逻辑体系结构。拟议的研究直接解决了半导体行业对节能技术扩展的长期解决方案的持续追求。参与这项研究的本科生和研究生将获得跨学科领域的全面培训，为他们在新兴的纳米电子行业的职业生涯做准备。所开发的设备模型、纳米制造技术和设计方法将用于制作课件，这些课件将通过我们的网站提供给其他教育工作者、研究人员和工业从业者使用。

Project SummaryObjectives: The objective of our proposal is co-exploration of simulation and design of single or few electron nanoscale quantum devices into binary decision diagram based reconfigurable logic architectures for realization of robust, ultra-low power computing systems. The approach is based on split-gate quantum nanodots as the decision node elements while incorporating functional reconfigurability. This research will primarily focus on the device architecture design to demonstrate its viability in realizing logic architectures with sufficient logic depth, functional robustnesss, and energy delay product approaching the quantum limit.Intellectual merit: Key contributions expected from this research are: 1) Simultaneous design and optimization of nanoscale quantum devices to implement system level logic architecture operating with record power-delay product approaching the quantum limit of kT/q*ln(2) 2) Detailed quantum simulations of single and cascaded devices to facilitate design of reconfigurable BDD-based logic circuits for achieving reliable ultra low power operation. The proposed research is transformative since it will expand our fundamental understanding of physics and operation of compound semiconductor based nanodevices in restricted geometries in novel multiple gate configurations, as well as design and implementation of energy efficient reconfigurable BDD logic architectures.Broader Impact: The results from this research will foster new directions at the intersection of material science, electrical engineering and computer engineering extending mesoscopic devices to logic architectures. The proposed research directly addresses the ongoing quest in the semiconductor industry for longer term solutions to energy efficient technology scaling. Undergraduate and graduate students, involved in this research, will get versatile training in cross-disciplinary areas in preparation of their careers in the burgeoning nanoelectronics industry. The device models, nanofabrication techniques and design methodologies developed will be used in creating courseware which will be available through our website for use by other educators, researchers and industrial practitioners.