CT-ISG: Collaborative Research: Fault Tolerance in Crypto Hardware via Dynamic Assertion Checking
CT-ISG: Collaborative Research: Fault Tolerance in Crypto Hardware via Dynamic Assertion Checking
批准号:
0831349
负责人:
Ramesh Karri
金额:
$23.17万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2008
资助国家:
美国
项目状态:
已结题
起止时间:
2008-09-01 至 2013-08-31
中文摘要
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英文摘要
ABSTRACT:Secure applications require trustworthy hardware for successful deployment. A trustworthy hardware device (e.g., a smart card) should maintain its security properties even against efforts at probing and reverse engineering; moreover, sensitive data stored on a trustworthy hardware device should be protected at all times. Side-channels attacks are used to learn the secrets stored by a device through monitoring the side effects of its computation. The well known power side-channel attack uses the effect that a cryptographic key has on the power waveform as the cipher runs. Another side-channel attack, the focus of this project, is the Differential Fault Attack (DFA). DFAs alter the computations performed by a trustworthy device and use the faulty results to uncover secrets. An approach to defeating DFAs is to continuously check dynamic assertions, made part of its cryptographic algorithms (including, e.g., symmetric block and stream ciphers, asymmetric ciphers, and message authentication), against DFA. The project advances secure hardware design methods and methodologies, develops course material on side-channel attacks and countermeasures, and promotes technology transfer through partnerships with industry. The project has a strong education component with opportunities for international research experience.
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国内基金
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