Towards enabling a 2-3 orders of magnitude improvement in call handling capacities of switches
Towards enabling a 2-3 orders of magnitude improvement in call handling capacities of switches
批准号:
0087487
负责人:
Ramesh Karri
金额:
$45.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2001
资助国家:
美国
项目状态:
已结题
起止时间:
2001-09-01 至 2006-08-31
中文摘要
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英文摘要
Toward building large-scale switches, the current industry focus is on increasing packet handlingcapacities of switch fabrics from Gb/s to Tb/s. Although an increase in packet handlingcapacities and line card data rates requires a corresponding increase in call handling capacities ofswitches, this problem has received little attention. This is because most of the work on scalabilityof packet switch fabrics has targeted connectionless internet protocol (IP) routers, while call handlingarises only in connection-oriented networks. However, in the last few years, resource reservationto support Quality-of-Service (QoS) guaranteed flows has gained attention. InternetEngineering Task Force (IETF) is addressing this issue by augmenting IP routers with connection-orientedcapabilities. In a connection-oriented network, the signaling protocol that is used to set up and release connectionsimpacts its call handling capacity. Signaling messages can be complex with many parametersand timers and the state information associated with calls can become unwieldy.Consequently, signaling protocols have traditionally been implemented in software. QoS controlsolutions are being developed and evaluated based on the premise that call handling capacities donot scale with the packet handling capacities of switch fabrics. This assumption regarding callhandling capacities has also relegated circuit-switched networks, including high-speed Wave-lengthDivision Multiplexed networks, to just serve as wires. This proposal challenges this basicassumption by demonstrating call handling capacities in the order of millions of calls/sec. Changingthis basic assumption regarding call handling capacities would indeed have a far-reachingimpact on both QoS control mechanisms for packet-switched networks, and on the use of emerginghigh-speed circuit-switched networks for challenging new applications. Our solution approach is to implement signaling protocols in reconfigurable Field ProgrammableGate Array (FPGA) hardware. FPGAs can be reprogrammed as signaling protocols evolvewhile significantly improving the call handling capacities relative to software implementation. Tomanage complexity, we propose to implement the basic and frequently-used operations of the protocolin hardware, and relegate the complex and infrequently-used operations to software. In contrastto stateless protocols, signaling protocols maintain state information for each call. Tomanage associated memory requirements, we propose to maintain only the essential state informationfor each call in hardware. In this project we propose to (i) implement a typical signalingprotocol in FPGAs, (ii) design a switch controller board using the signaling protocol FPGAs, and(iii) quantify measures of the implementation to demonstrate achievable call handling capacities.
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