CAREER: Computer Aided Design Tools for Fault-Tolerant and Highly-Reliable Scalable VLSI Systems

本研究的重点是发展在寄存器传输级设计容错和高可靠系统的基本思想和技术。在当今和未来的技术中，失效机制是多种多样的，包括：制造缺陷、热电子效应、串扰和电迁移。在这个项目中，研究者正在探索在系统设计过程的注册转移阶段为容错设计和为可靠性设计的技术。还讨论了基于目标故障的统计和物理特性来增强容错性和提高可靠性的设计方法。最后，用于设计容错和可靠的超大规模集成电路系统的软件工具正在开发中，并将纳入现有的CAD系统。这些研究成果正被纳入课程。

This research is on developing fundamental ideas and techniques for designing fault-tolerant and highly reliable systems at the register-transfer level. In today's and future technologies failure mechanisms are many, including: manufacturing spot defects, hot electron effects, crosstalk and electro-migration. In this project, the investigator is exploring techniques for design-for-fault-tolerance and design-for-reliability during the register-transfer phase of a system design process. Also being addressed are design methodologies for fault-tolerance enhancement and reliability improvement based on the statistics and physics of the targeted failures. Finally, software tools for the design of fault-tolerant and reliable VLSI systems are being developed and will be incorporated into existing CAD systems. These research results are being integrated into the curriculum.