TWC: Small: Belling the CAD: Towards Security-Centric Electronic System Level Design
TWC: Small: Belling the CAD: Towards Security-Centric Electronic System Level Design
批准号:
1526405
负责人:
Ramesh Karri
金额:
$49.8万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2015
资助国家:
美国
项目状态:
已结题
起止时间:
2015-09-01 至 2021-08-31
中文摘要
集成电路(ic)是许多关键应用的核心,从金融和医疗保健到航空电子和军事应用。因此,值得信赖的智能身份证是确保社会安全的基础。不幸的是,成本考虑和全球化已将IC设计推向分散式和分布式范式,其中系统级集成电路(SOC)的设计跨越不同的公司和国家,这些SOC的制造发生在第三方(离岸)代工厂。硬件木马、知识产权盗版和逆向工程等威胁已经出现。这使得IC设计师质疑他们对自己设计的soc的信任。由于SOC是信任的基础,因此无论底层操作系统和软件有多安全,在受损的SOC平台上运行的应用程序都容易受到攻击。集成电路的复杂性呈指数级增长。为了跟上这种复杂性,电子系统级(ESL)计算机辅助设计(CAD)工具被用于设计集成电路,从而使设计过程更简单、自动化,设计周期更短。该项目开发了一个具有安全意识的ESL设计工具流,并通过展示如何对ESL生成的设计进行逆向工程来演示行业标准ESL设计流中的安全漏洞。本研究开发了将安全性构建到ESL设计流程中的方法,从而产生具有逆向工程弹性的soc和系统。
英文摘要
An Integrated Circuit (ICs) is at the core of many critical applications from financial and healthcare to avionics and military applications. Trustworthy ICs are therefore fundamental in ensuring the safety and security of our society. Unfortunately, cost considerations and globalization have pushed the IC design to a decentralized and distributed paradigm, where the design of a system-on-an-IC (SOC) spans various companies and countries with the fabrication of these SoCs taking place in third party (offshore) foundries. Threats, such as hardware Trojans, intellectual property piracy, and reverse engineering have emerged. This makes IC designers question their trust in the SOCs that they design. As SoCs are the roots of trust, applications that run on a compromised SOC platform is vulnerable regardless of how secure the underlying operating system and software is. Complexity of ICs has been growing exponentially. To keep pace with this complexity, electronic system level (ESL) computer aided design (CAD) tools are being used to design ICs, resulting in simpler and automated design processes and shorter design cycles. This project develops a security-aware ESL design tool flow, and demonstrates the security vulnerabilities in industry standard ESL design flows by showing how one can reverse engineer an ESL generated design. This research develops approaches to build security into the ESL design flow, yielding reverse-engineering-resilient SoCs and systems.
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