SHF:Small: Portable High-Level Programming Model for Heterogeneous Computing Based on OpenMP

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High-end systems and general-purpose computers alike are increasingly being configured with hardware accelerators. A typical system, or node of a large-scale platform, contains a few multicore processors that share memory, together with one or more coprocessors, such as a high-end accelerator board, an inexpensive programmable graphics card (GPGPU), or an FPGA (Field Programmable Gate Array). The coprocessors will typically have a different instruction set, distinct memory, a different operating environment and markedly different execution characteristics than the multicore component of the system. As a result, these heterogeneous platforms pose tough challenges with regard to their programmability. The goal of this research is to significantly simplify the process of developing code for heterogeneous platforms by providing a single, high-level programming interface that may be used across, and within, multicore processors and a broad variety of accelerators. Language features will be designed, in the form of an extension to the industry standard OpenMP API, that will enable the application developer to specify code regions for acceleration, along with the necessary synchronization and data motion. The implementation will translate the resulting enhanced OpenMP for a variety of heterogeneous platforms.