SBIR Phase I: Massively Dense 3D Integrated Memory

这个小型企业创新研究第一阶段项目将使用集成电路(IC)制造中常见的材料，进一步开发一种两端、电子可编程、非易失性存储器阵列。每个元件都比单个晶体管小，并使用标准IC层形成。这导致了使用单个基板实现的三维集成存储器(3DIM)体系结构，而不需要将多个芯片与先进的键合技术连接在一起。这些器件的通断电导比和开关速度超过了竞争技术的性能。电流流经器件的纳米尺寸区域，因此，随着IC技术继续朝着更小的特征尺寸发展而不减少流经器件的电流，每个器件将缩放到更小的尺寸，从而产生具有信噪比的密集存储器阵列体系结构，其信噪比将随着后续的IC技术的提高而提高。拟议的总体方案将包括集成钝化层、将每个元件与二极管连接、优化器件架构以最大限度地减少占地面积，以及实现3DIM控制和驱动接口电子产品。这里提出的计划通过提供材料创新来提高电子设备的性能，其中纳米级半导体细丝在用于商业数据存储应用的介质材料中制造。该项目的更广泛的影响/商业潜力是在用于无线、手持、移动互联网和其他使用非易失性存储器的便携式设备的微电子芯片制造领域。具有两个端子、电子可编程电导的材料可能会影响包括闪存和嵌入式存储器在内的众多商业市场，并将提供比当前可用的存储器技术高出数量级的数据存储密度。通过在单个衬底上实现大规模密集3D存储器阵列架构，不需要制作两个衬底并将它们结合在一起，从而大大简化了制造工艺，降低了制造成本，提高了产品成品率。最近在单个衬底上实现3D存储的一些方法并不成功，这是因为外场导致比特错误和低信噪比的问题，或者是因为设备操作基于热、离子传输或相变机制，这些机制固有地很慢。拟议中的存储元件是使用电信号而不是热能或化学能控制的，这使得它们非常高效，而且比竞争技术快得多。除了便携式设备，拟议中的3D设备还可能在基于空间的地球科学和天文学中找到应用，因为它对x射线和高能质子辐射具有耐受性。计划对其他辐射类型进行额外的测试。

This Small Business Innovation Research Phase I project will further develop a two-terminal, electronically-programmable, nonvolatile memory array using materials commonly found in integrated circuit (IC) manufacturing. Each element is smaller than a single transistor and is formed using standard IC layers. This results in a three-dimensional integrated memory (3DIM) architecture achieved using a single substrate without the need for attaching multiple die together with advanced bonding techniques. The ON/OFF conductance ratio and switching speed of these devices exceed the performance of competing technologies. Current flows through nanometer-sized regions of the device, and, as a result, each device will scale to smaller dimensions as IC technology continues to progress towards smaller feature sizes without reducing the current through the device, thereby resulting in a dense memory array architecture with signal-to-noise ratio that will improve for each subsequent IC technology. The proposed overall program will include integrating a passivation layer, connecting each element with a diode, optimizing device architecture to minimize footprint, and implementing 3DIM control and drive interface electronics. The program proposed herein addresses the topic by providing material innovations for improved performance in electronics where nano-scale semiconducting filaments are fabricated within a dielectric material for commercial data storage applications.The broader impact/commercial potential of this project are in the areas of microelectronics chip manufacturing for wireless, hand-held, mobile internet and other portable devices using non-volatile memory. Materials exhibiting two-terminal, electronically-programmable conductance can potentially impact numerous commercial markets including flash and embedded memory, and will offer orders of magnitude more data storage density as currently-available memory technologies. By implementing massively dense 3D memory array architecture on a single substrate, there is no need to fabricate two substrates and bond them together, thereby greatly simplifying the fabrication process, reducing manufacturing cost and increasing product yield. Some recent approaches to achieve 3D memory on a single substrate have not been successful due to problems with external fields causing bit errors and low signal-to-noise ratio, or because device operation is based on thermal, ionic transport, or phase-change mechanisms that are inherently slow. The proposed memory elements are controlled using electrical signals rather than thermal or chemical energy, making them highly efficient and much faster than competing technologies. In addition to portable devices, the proposed 3D device may find applications in space-based earth sciences and astronomy since it is tolerant to x-ray and high-energy proton radiation. Additional testing in planned for other radiation types.