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SHF: Small: Towards a Versatile Analytical Modeling Toolset for Evaluating Memory Hierarchy Design

SHF: Small: Towards a Versatile Analytical Modeling Toolset for Evaluating Memory Hierarchy Design
SHF:小型:用于评估内存层次结构设计的多功能分析建模工具集
批准号:
1116540
负责人:
Yan Solihin
金额:
$40.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2011
资助国家:
美国
项目状态:
已结题
起止时间:
2011-08-01 至 2015-07-31

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中文摘要
翻译
今天,用于评估未来计算机系统设计的主要工具是模拟,其中每条机器指令及其对处理器和内存状态的影响都被非常详细地模拟。处理器模拟虽然功能强大且用途广泛,但速度非常慢:大约比本机执行慢4到5个数量级。在未来,由于硬件和软件系统的复杂性同时增加,以及工作负载的多样性,单纯依靠处理器模拟将过于受限。分析建模试图捕获设计的各种参数之间的基本关系,并捕获它们如何影响性能或功率/能耗。分析模型运行起来要快得多,而且可以相当准确。不幸的是,由于缺乏研究人员可以使用和建立的广泛可用的工具集,以及使用和开发分析模型的高门槛,分析模型的广泛使用受到了阻碍。本提案的目标是将各种不同的分析模型集成到一个单一的工具集中,供研究人员用于计算机体系结构设计和评估。这个项目的预期结果是一个工具,它通过三个重要的角色来帮助处理器模拟:提供推理哪些参数决定性能现象的结果的能力,发现架构参数如何从根本上相互关联的见解,并提供一阶近似,允许缩小模拟研究的搜索空间。该项目使计算机设计和评估在质量(可以获得更深入的见解)以及资源效率(需要更少的模拟时间来达到相同的观察结果)方面得到显著改善。项目的可交付成果包括一个工具集,该工具集将项目的组件集成到一个易于使用且具有智能界面的软件包中,以及适合本科和研究生课程的课堂材料。这些材料将提供给公众下载、社区改进和社区扩展。
英文摘要
Today, the primary tool used for evaluating future computer system designs is simulation, where each machine instruction and its impact on processor and memory state are simulated in great details. While powerful and versatile, processor simulation is exceedingly slow: roughly four to five orders of magnitude slower than native execution. In the future, solely relying on processor simulation will be too constraining, due to simultaneous increase in the complexity of hardware and software systems, and variety of workloads. Analytical modeling is an attempt to capture fundamental relationships between various parameters of a design and to capture how they affect performance or power/energy consumption. An analytical model is much faster to run and can be reasonably accurate. Unfortunately, widespread uses of analytical models have been hampered by the lack of widely available toolset that researchers can use and build upon, and the high barrier of entry into using and developing them. The objective of this proposal is to integrate various disparate analytical models into a single toolset that can be used by researchers for computer architecture design and evaluation. The expected outcome of this project is a tool that aids processor simulation through three important roles: providing ability to reason about what parameters determine the outcome of a performance phenomenon, discovering insights into how architecture parameters fundamentally relate to one another, and providing first-order approximation that allows narrowing down the search space for simulation studies. The project enables computer design and evaluation to be improved significantly in terms of quality (deeper insights can be obtained), as well as resource efficiency (less simulation time is required to arrive at the same observations). A deliverable of the project includes a toolset that integrates components of the project into a software package that is easy-to-use and has intelligent interface, and classroom materials suitable for undergraduate and graduate courses. These materials will be made available for public download, community enhancement, and community extension.
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Collaborative Research: CNS Core: Medium: Understanding and Strengthening Memory Security for Non-Volatile Memory
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SHF: Small: Collaborative Research: Efficient Memory Persistency for GPUs
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