EAGER: Overcoming Thermal Sensitivity of CMOS-Compatible Nanophotonic Devices in Future Microprocessor Designs

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A group of three principal investigators will undertake a holistic study of prospects of nano-photonic interconnects in the context of integration with silicon technologies for improved computational speed, latency and lower power dissipation. An unique aspect of the project is that the PIs come from different backgrounds, namely photonic devices and computer architecture, and an integrated design methodology that will exploit feedback from devices to architectures will be central to this high-risk project with potential for large payoff. Specifically, this project will examine thermal sensitivities of nano-photonic devices and study its influence on computing architectures making use of optical interconnects. Conversely, the requirements imposed by architectural considerations on the device technology will be studied as well.The potential broader impact of the project is largely technological. If successful, t has the potential to revolutionize the interconnect technology, which is one of the major bottlenecks in further progress of large scale computer hardware design today. Nevertheless, the PIs also plan to disseminate the results of their findings through workshops and class room efforts and to include women and underrepresented groups in their activities, which should enhance the broader impact of the project.