CAREER: Power-Performance Considerations of Thread-level Parallelism in On-chip Multicore Architectures

职业：片上多核架构中线程级并行的功耗性能考虑

• 批准号: 0545995
• 负责人: Jose Martinez
• 金额: $ 30万
• 依托单位: Cornell University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2006
• 资助国家: 美国
• 起止时间: 2006-06-15 至 2013-05-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0545995&HistoricalAwards=false
• 关键词: CAREER; Power; Performance; Considerations; Thread

As the microprocessor industry moves toward multicore solutions (several processor cores on a single chip), performance growth on these inherently power-constrained platforms will increasingly rely upon their ability to support thread-level parallelism efficiently. The goal of the research project in this CAREER proposal is to develop the necessary insights for the successful design of mechanisms that can address the unique power-performance opportunities and challenges of running parallel applications on multicore chip architectures. We explore power-aware control of parallelism in such architectures by combining information about the application's parallel behavior, the operating constraints, and the chip's support for voltage/frequency scaling and other mechanisms for power management. Integral to this CAREER proposal is a broad educational plan with specific goals at several education levels. We also provide concrete initiatives to promote engineering among high-school girls and underrepresented minorities, and to mentor them throughout their college years.

随着微处理器行业向多核解决方案（单个芯片上的几个处理器内核）发展，这些固有的功耗受限平台的性能增长将越来越依赖于其有效支持线程级并行的能力。本CAREER提案中的研究项目的目标是为成功设计机制开发必要的见解，这些机制可以解决在多核芯片架构上运行并行应用程序的独特功耗-性能机会和挑战。我们探索这种架构的并行性的功率感知控制相结合的信息，应用程序的并行行为，操作限制，和芯片的支持电压/频率缩放和其他机制的电源管理。该职业建议的组成部分是一个广泛的教育计划，在几个教育层次有具体的目标。我们还提供具体的举措，以促进高中女生和代表性不足的少数民族工程，并在他们的大学生涯中指导他们。