CSR---SMA: Computer Architecture Optimization: A Machine Learning Approach

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Exponential increases in transistor densities at each new technology generation have allowed us to build chips with greatly enhanced capabilities and functionality. The last twenty years have witnessed the introduction and adoption of numerous architectural advances at the processor level, as computer architects have successfully translated increases in transistor budgets to performance. Unfortunately, effective hardware policies for managing and controlling these complex artifacts have not advanced commensurately. Most policies are ad hoc at best, and generally incapable of providing important functionalities like anticipating the long-term consequences of decisions (planning), or generalizing from experience obtained through decisions executed in the past to act successfully in new situations (learning).At the same time, the artificial intelligence and machine learning communities have made tremendous strides in designing computer programs and algorithms that learn about their environment and improve automatically with experience. The proposed inter-disciplinary work will develop methodologies based on such a technology to design efficient, adaptable, and self-optimizing on-chip hardware policies. The project will concentrate on chip multiprocessors, in which opportunities for hardware management promise to be numerous and challenging. If successful, this approach may set off a change in the way computer architects think about and conduct research on computer architecture design.The project will apply machine learning technology in two ways: (1) tools for the systematic design of optimized management policies that can then be installed in hardware (e.g., ROM-based circuits); and (2) self-optimizing hardware agents that implement efficient policies, can learn from their environment, and improve automatically with experience.