EAGER: Developing a Programming Environment for Heterogenous Multiprocessors

EAGER：为异构多处理器开发编程环境

• 批准号: 1157377
• 负责人: Laxmi Bhuyan
• 金额: $ 29.93万
• 依托单位: University of California-Riverside
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2012
• 资助国家: 美国
• 起止时间: 2012-09-01 至 2015-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1157377&HistoricalAwards=false
• 关键词: EAGER; Developing; Programming; Environment; Heterogenous

Intellectual Merit: This EAGER project addresses distribution issues for systems executing on heterogeneous computing architectures, that is, architectures that have been configured with graphics processing units (GPUs) and field-programmable gate array (FPGAs).Heterogeneous architectures may offer considerable increase in throughput when compared to simple multi-processor architectures. But, to achieve maximum gain and resource utilization in heterogeneous architectures, an application?s workload needs to be distributed among accelerators and CPUs according to the computational capabilities of those components. The optimal distribution of tasks and data among processing units is an important concern for such platforms. Dynamic partitioning can better utilize all computational units during execution. However, even though this type of partitioning is addressed in a few published studies, full utilization gains have not been reported. This team will attempt to develop ?near ideal? partitioning schemes which require: ? devising monitoring mechanisms for each type of accelerator, ? quantifying tasks and data as computational blocks, and ? estimating performance throughout execution. These load balancing schemes will be application and device independent and fully automated without the need for prior training runs before the actual run. The goal is to integrate these schemes with programming models to seamlessly expose near optimal utilization of heterogeneous multiprocessor architectures.Broader Impact: The software and hardware platforms developed in this research will be publicly released as open source so that others may experiment with them. The research will be conducted with cooperation of Intel researchers enabling possible future transfer of technology to industry. Funding of this project will provide support for recruiting underrepresented minority and female students for the project. In addition, the research content will be integrated to graduate courses to provide training to students for designing and programming future heterogeneous systems.

智力优势：这个EAGER项目解决了在异构计算架构上执行的系统的分布问题，异构计算架构是指已经配置了图形处理单元（GPU）和现场可编程门阵列（FPGA）的架构。与简单的多处理器架构相比，异构架构可以提供相当大的吞吐量增加。但是，要在异构体系结构中实现最大的收益和资源利用率，应用程序？的工作负载需要根据这些组件的计算能力在加速器和CPU之间分配。任务和数据在处理单元之间的最佳分配是此类平台的重要关注点。动态分区可以在执行期间更好地利用所有计算单元。然而，即使这种类型的分区在一些已发表的研究中得到了解决，但尚未报告充分利用收益。这个团队将尝试开发？近理想？分区方案需要：？为每种类型的加速器设计监测机制，将任务和数据量化为计算块，以及？评估整个执行过程中的性能。这些负载平衡方案将独立于应用程序和设备，并完全自动化，而无需在实际运行之前进行预先培训。我们的目标是将这些计划与编程模型无缝地暴露近最佳利用率的异构多处理器architecture.Broader影响：在这项研究中开发的软件和硬件平台将公开发布为开源，以便其他人可以尝试与他们。这项研究将与英特尔研究人员合作进行，以便将来可能将技术转移到工业领域。该项目的资金将用于为该项目招募代表性不足的少数民族学生和女学生。此外，研究内容将被整合到研究生课程，为学生提供培训，设计和编程未来的异构系统。