High-Performance Switch Architectures for CC-NUMA Servers

缓存一致非统一内存访问（CC-NUMA）架构正迅速成为可扩展多处理器设计的标准。这种体系结构的主要问题在于远程内存访问时间长。本项目旨在为CC-NUMA机器设计新颖的交换机架构，以减轻内存延迟问题。基于动态分配的组合缓冲区和带虚拟通道的虫洞路由的定制交换机设计正在开发中。对交换仲裁器进行了重新设计，以便在共享内存环境中为不同类型的消息提供不同的优先级。一种新的交换机缓存架构正在开发中，它使用缓冲区作为交换机内部的缓存来支持处理器之间的数据共享，作为预取或受害者缓冲区，并作为分布式目录来保持缓存一致性。处理器和内存管理的硬件和软件支持也正在研究中。研究共享内存应用程序的行为是这个项目不可分割的一部分。新的设计被整合到一个执行驱动的模拟器中，各种科学和商业应用的性能改进正在被测量。

The Cache-Coherent Non-Uniform Memory Access (CC-NUMA) architectures are rapidly becoming a standard for scalable multiprocessor design. The main problem with such architectures lies in the large remote memory access time. This project deals with designing novel switch architectures for the CC-NUMA machines to alleviate the memory latency problem. Custom switch designs are being developed based on dynamically allocated combined buffer and wormhole routing with virtual channels. The switch arbiter is redesigned to provide different priorities for different type of messages as applicable in a shared memory environment. A new switch cache architecture is being developed which uses the buffers as a cache inside the switch to support data sharing between the processors, as a prefetch or victim buffer, and as distributed directories to maintain cache coherence. Hardware and software support for processor and memory management is also being investigated. Study of the behavior of shared memory applications forms an integral part of the project. The new designs are incorporated in to an execution-driven simulator and the performance improvement of various scientific and commercial applications is being measured.