CSR: Small: Core Scheduling to Improve Virtualized I/O Performance on Multi-Core Systems
CSR: Small: Core Scheduling to Improve Virtualized I/O Performance on Multi-Core Systems
批准号:
0912850
负责人:
Laxmi Bhuyan
金额:
$46.08万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2009
资助国家:
美国
项目状态:
已结题
起止时间:
2009-09-01 至 2014-08-31
中文摘要
该项目的重点是减少多核平台中网络处理的开销和增加吞吐量。特别是,为了促进下一代系统的虚拟化,提出了在内核之间均衡分组处理功能的建议。目前市场上大量存在将多个CPU内核放在同一芯片上的低成本多核架构。研究人员正在为不同的应用开发一系列编程技术,以有效地利用这种多核架构中的并行性。然而,对于如何缓解I/O瓶颈(协议处理开销主导CPU执行时间)的研究却很少。多核使得虚拟化在包括服务器整合和各种资源共享在内的各种用途中引起了广泛的兴趣。研究表明,虚拟化给网络I/O带来了显著的额外开销。该项目的目标是开发技术,以优化高速网络的虚拟化I/O的性能。特别是,研究小组探索了虚拟化环境中的新软件技术,可以通过以下方法减少多核处理器中的网络I/O开销:1.数据包寿命分析:这涉及一种测量技术,用于跟踪10千兆以太网虚拟化环境中数据包的寿命。该研究仪器的操作系统软件,并应揭示潜在的瓶颈功能,大大有助于数据包延迟。2.多线程处理协议栈:基于数据包生命周期分析,客户机操作系统和虚拟机监控器(VMM)中的TCP/IP协议栈将被划分为多个线程,这些线程可以在多个内核上并行执行,从而降低了延迟。核心调度技术被开发来将这些线程分配到不同的核心,以便利用多核架构的该高速缓存局部性。3.管道调度:任务不是根据延迟瓶颈来划分协议栈,而是根据代码大小和开发的多个线程来划分任务。开发了适当调度线程的技术,以减少该高速缓存未命中。4.虚拟化环境的组合调度:尽管并行/流水线技术是与TCP/IP堆栈和VMM分开开发的,但它们被组合在一起以在虚拟化环境中创建多个线程,并应用各种代码调度优化来减少延迟并增加I/O吞吐量。这里所述的一个补充项目得到了英特尔公司赠款的部分支持。因此,从该项目中获得的研究成果可能具有很大的技术转让潜力。PI已经指导了几个博士。毕业生谁后来开发的建筑研究的声誉,他已经指导了四个女博士。在过去两年中,该方案为毕业生提供了培训,为提高该国计算机领域的妇女代表性做出了贡献。这些努力在NSF项目下继续进行。UCR被认为是少数民族服务机构。因此,本科生的参与将使少数群体能够参与该项目。
英文摘要
This project focuses on reducing the overhead and increasing throughput of network processing in multi-core platforms. In particular, packet processing functions are proposed to be balanced across the cores so as to facilitate virtualization in next-generation systems.Low-cost multi-core architectures that put many CPU cores on the same chip are abundantly available in the market today. Researchers are developing a range of programming techniques for different applications to efficiently utilize the parallelism available in such multi-core architectures. However, research into how to alleviate the I/O bottleneck, where protocol-processing overhead dominates the CPU execution time, is sparse.Multicore has enabled broad interest in virtualization for diverse uses including server consolidation and sharing of various resources. Studies have shown that virtualization brings significant extra overhead to network I/O. The objective of this project is to develop techniques to optimize the performance of virtualized I/O with high-speed networks. In particular, the research team explores new software techniques in virtualized environments, that may reduce the network I/O overhead in multi-core processors, through the following approaches: 1. Life of a Packet Analysis: this involves a measurement technique to trace the life of a packet in a virtualized environment with 10 Gigabit Ethernet. The study instruments the OS software, and should reveal potential bottleneck functions that contribute heavily to packet latency. 2. Mutithreading the protocol stack: Based on life-of-a-packet analysis, the TCP/IP protocol stack in the guest O/S and virtual machine monitor (VMM) will be divided into multiple threads that can execute in parallel on multiple cores and cut down the latency. Core scheduling techniques are developed to allocate these threads to different cores so as to exploit the cache locality of the multi-core architecture. 3. Pipeline Scheduling: Instead of splitting the protocol stack in terms of latency bottleneck, tasks are partitioned based on code size and multiple threads developed. Techniques are developed to schedule the threads appropriately so that the cache misses are reduced. 4. Combined Scheduling for Virtualized Environment: Although the parallel/pipeline techniques are developed separately from the TCP/IP stack and VMM, they are combined to create multiple threads in a virtualized environment and various code scheduling optimizations are applied to reduce latency and increase I/O throughput. A complimentary project to the one described here has been partly supported by grants from the Intel Corporation. Hence, the research results obtained from this project may have strong potential for technology transfer. The PI has mentored several Ph.D. graduates who later developed reputations for architecture research and he has mentored four female Ph.D. graduates during the last two years, contributing to increasing the representation of women in computing in the country. Such efforts continue under this NSF project. UCR is recognized as a minority serving institution. Hence, involving undergraduate students will enable minority participation in the project.
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