CAREER: Scaling of Memristive Nanodevices and Arrays

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The research objectives of this CAREER proposal are to fabricate, test, characterize and understand memristive nanodevices and arrays with unprecedentedly small feature size and high packing density. The approaches are: 1) scaling of memristive nanodevices using nanoimprint lithograpy, electron beam lithography, directed self-assembly of block copolymer, and the combination of these next generation nanolithography technologies; 2) systematic electrical measurements of the devices/arrays of different length scale and elucidation of the scaling rules to sub-5 nm regime; and 3) physical characterization and underlying device physics studies at different length scales. Intellectual Merit As CMOS scaling approaches its limit, it is important that we develop new devices more versatile in functionality. Memristive devices are two-terminal passive electronic devices that use high and low resistance states instead of charge storage as '1's and '0's. As a result, the device scalability is not limited by the quantum effect but only dependent on how small the device one can make. Memristive devices have fast switch speed, overwrite ability without erase, low power consumption, high endurance and long data retention time. They are promising for applications in non-volatile memory, non-volatile logic, reconfigurable circuits and neuromorphic networks.This proposed research will lead to significantly smaller memristive nanodevices (3 nm) in the densest arrays (10 Tbits/in2), offering a universal solution to high-density non-volatile data storage and non-volatile logic. With devices of different dimensions available, full spectrum studies in device switching behavior (power consumption, endurance, switching speed, data retention time, etc.) as a function of size will be extended to sub-5 nm. Consequently, the proposed research will increase our understanding of the switching mechanisms/device physics and extend our knowledge to a physical regime not as yet achieved.Broader ImpactsThe proposed work will have significant scientific, educational and societal impact. The research will advance transformative device technologies for the integrated circuits (IC) industry, sustaining the U.S. competitiveness in high-technology areas. The education objectives of this CAREER proposal are to train next generation researchers and engineers, and to create motivating learning opportunities for students, STEM (Science, Technology, Engineering and Mathematics) teachers and the general public. The approaches to accomplishing these goals include: 1) innovative curricula design in semiconductors and nanotechnology for both graduate and undergraduate students; 2) inspiring research experience for undergraduate students, in particular women and minorities; and 3) engaging outreach activities such as Nanotechnology Summer Institute at UMass Amherst for K-12 teachers and promoting nanoscience using art among a much broader audience including the general public.