SHF: Small: Collaborative Research: Delay Signatures: Blurring the Boundary between the Network and the Processor

SHF：小型：协作研究：延迟签名：模糊网络和处理器之间的界限

• 批准号: 1318571
• 负责人: William Robinson
• 金额: $ 25万
• 依托单位: Vanderbilt University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2013
• 资助国家: 美国
• 起止时间: 2013-08-01 至 2016-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1318571&HistoricalAwards=false
• 关键词: SHF; Small; Collaborative; Research; Delay

The distinction between computing and communication has blurred with the improvements in semiconductor technology as well as the speed and reliability of computer networks. At a macroscopic level, individuals increasingly rely upon smart phones, cloud computing, and similar infrastructure that combines computing systems with networking to accomplish their daily tasks. Many end-users even consider the client device, the server, and the network as one blended unit that is used for productivity and/or entertainment. At the microscopic level, the linkage between the two areas ideally should not require the use of special-purpose software, because installing software on a network node to enable this blending can potentially cause the node to be unstable or more complex, and potentially introduce security flaws. However, linking the two domains without the use of additional software remains a significant challenge. This research focuses on understanding and characterizing the connection between the computing node and the network to meet that challenge. For example, by simply probing a node's network traffic and collecting its responses, it can be determined that the internal components (e.g., microprocessor) are heavily utilized. If the node is expected to be idle, then this indicator could signal that the node has been compromised and is running unauthorized software. This project uses a holistic approach that combines computer architecture and computer networking to investigate and characterize how the microarchitecture affects the network packet generation process. Since the internal components of a node are shared resources among all processes, including those that require network-based I/O, it is possible to infer the load on the internal components by observing variations in delay between successive network packets that are generated by the node. This inference materializes as a "delay signature," and can be used to blend the areas of architecture and networking. The delay signature provides information that can be attributed to the internal state and settings of the microarchitecture. Architectural settings, such as processor affinity, multi-threading, and power-saving modes, affect the delay signature. The PIs use a hardware testbed and a system simulator to characterize and model the basic system components that can have a significant (direct or indirect) impact on packet generation. The project culminates with the creation of a general-purpose engine that automates the detection of utilization signatures and uses those signatures to predict node utilization remotely. The PIs incorporate team-based laboratory projects within their computer architecture and computer networking courses to demonstrate the relationship between the two domains and to promote integrated learning by students in both areas. Further, the investigators employ an outreach plan with complementary components to: (1) encourage students to enter the science and engineering fields and (2) mentor potential faculty members to serve as educators and role models. Potential applications of the delay signature include: (1) providing security for networked nodes by monitoring unauthorized utilization and (2) providing efficient scheduling in cluster grids.

随着半导体技术的进步以及计算机网络的速度和可靠性，计算和通信之间的区别已经变得模糊。在宏观层面上，个人越来越多地依赖于智能手机、云计算以及将计算系统与网络相结合的类似基础设施来完成他们的日常任务。许多最终用户甚至将客户端设备、服务器和网络视为用于生产力和/或娱乐的一个混合单元。在微观层面上，两个区域之间的链接理想情况下不需要使用专用软件，因为在网络节点上安装软件以实现这种混合可能会导致节点不稳定或更复杂，并可能引入安全漏洞。然而，在不使用额外软件的情况下将这两个域连接起来仍然是一个重大挑战。本研究的重点是理解和表征计算节点和网络之间的连接，以应对这一挑战。例如，通过简单地探测节点的网络流量并收集其响应，可以确定内部组件（例如，微处理器）被大量使用。如果该节点预计将是空闲的，那么这个指标可能表明，该节点已受到损害，并正在运行未经授权的software. This项目使用一个整体的方法，结合计算机体系结构和计算机网络的调查和表征如何影响网络数据包生成过程的微体系结构。由于节点的内部组件是所有进程（包括需要基于网络的I/O的进程）之间的共享资源，因此可以通过观察由节点生成的连续网络分组之间的延迟变化来推断内部组件上的负载。这种推断具体化为“延迟签名”，并且可以用于混合架构和网络领域。延迟签名提供了可以归因于微架构的内部状态和设置的信息。架构设置（如处理器关联、多线程和节能模式）会影响延迟特征。PI使用硬件测试平台和系统模拟器来表征和建模可能对数据包生成产生重大（直接或间接）影响的基本系统组件。该项目最终创建了一个通用引擎，该引擎可以自动检测利用率签名，并使用这些签名远程预测节点利用率。各专业进修学院的电脑架构及电脑网络课程，均以小组形式进行实验，以展示这两个范畴之间的关系，并促进学生在这两个范畴的综合学习。此外，研究人员采用了一个具有互补成分的外展计划：（1）鼓励学生进入科学和工程领域，（2）指导潜在的教师担任教育工作者和榜样。延迟签名的潜在应用包括：（1）通过监控未授权的使用来为网络节点提供安全性;（2）在集群网格中提供有效的调度。