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SHF: Small: Online Detection and Recovery from Electrostatic Discharge Induced Transient Errors

SHF: Small: Online Detection and Recovery from Electrostatic Discharge Induced Transient Errors
SHF:小型:在线检测并从静电放电引起的瞬态错误中恢复
批准号:
1526106
负责人:
Elyse Rosenbaum
金额:
$45.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2015
资助国家:
美国
项目状态:
已结题
起止时间:
2015-07-15 至 2019-06-30

项目摘要

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中文摘要
翻译
如果静电放电(ESD)产生的能量到达移动设备内部的集成电路组件,则可能会导致故障。通常需要多个设计周期,产品才能通过ESD资格测试,只有零星的、相对温和的软故障才会发生。软故障的表现包括应用程序挂起、操作系统崩溃、信号保真度差、数据传输错误和显示器瞬间闪烁。这些被称为软故障,因为它们是可以恢复的,尽管可能需要操作员干预,例如,可能必须关闭电源然后再打开。该项目将开发用于演示基于操作系统的方法以减轻ESD引起的软故障的技术。预计这将减少重新设计硬件以满足ESD规格的需要,从而缩短移动设备和其他电子产品的上市时间。这样的技术可能随后被应用于减轻广泛的可靠性和安全风险。该项目将涉及研究生和本科生,包括代表性不足的群体的成员,从而有助于扩大信息和通信技术领域的劳动力。ESD诱导的噪声的特征可以在集成电路(IC)中检测到,当检测到这种噪声时,整个IC可能会出现逻辑错误。这将证明,ESD探测器可以放置在IC内部;当激活时,将向操作系统发送中断信号。为了功率和面积效率,不会尝试识别IC内部受影响的寄存器,也不会以不同的方式处理不同类型的错误。相反,操作系统将被设计为对即将出现的错误的通知做出响应,并随后将系统回滚到先前的“已知良好”检查点。建议的解决方案将在硬件中进行验证,这将允许在应用程序级别表征ESD引起的错误。为了能够进一步研究静电放电引起的故障分析、诊断和恢复,还将对静电放电引起的错误进行故障建模。
英文摘要
If energy from an electrostatic discharge (ESD) reaches the integrated circuit components inside a mobile device, failure may result. Multiple design cycles are generally needed before a product can go through ESD qualification testing with only sporadic, relatively benign, soft failures occurring. Manifestations of soft failures include a hanging application, an operating system crash, poor signal fidelity, data transmission errors, and momentary display flickering. These are referred to as soft failures because they are recoverable from, although operator intervention may be needed, e.g., one may have to turn the power off and on again. This project will develop techniques for demonstrating an operating system based approach for mitigating ESD-induced soft failures. It is expected to reduce the need for hardware to be redesigned to meet ESD specifications, thereby resulting in a shorter time-to-market for mobile devices and other electronic products. Such techniques can potentially subsequently be applied to mitigate a broad range of reliability and security hazards as well. The project will involve graduate and undergraduate students, include members of underrepresented groups, and will thus help enlarge the workforce in information and communication technologies.The signature of ESD-induced noise can be detected in an integrated circuit (IC) and when such noise is detected, logic errors are likely to occur throughout the IC. It will be demonstrated that ESD detectors may be placed inside an IC; when activated, an interrupt signal will be sent to the operating system. In the interest of power and area efficiency, there will be no attempt to identify the affected registers inside the IC, nor to handle the different types of errors differently. Instead, the operating system will be designed to respond to the notice of impending errors and will subsequently rollback the system to a previous "known good" checkpoint. The proposed solution will be validated in hardware and this will allow ESD-induced errors to be characterized at the application level. To enable further research in ESD-induced failure analysis, diagnosis and recovery, fault modeling of ESD-induced errors will also be undertaken.
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IUCRC Phase II University of Illinois Urbana Champaign: Center for Advanced Electronics through Machine Learning (CAEML)
Collaborative Research: Planning Grant: I/UCRC for Advanced Electronics through Machine Learning
Electrical Overstress Protection for System-in-a-Package
CAREER: Electrostatic Discharge Protection in SOI-CMOS Circuits
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