NeTS: Small: Addressing End-system Bottlenecks in High-speed Networks

多年来，计算机中单个处理器执行指令的速度没有太大变化，需要取得重大技术突破，才能使目前的最佳速度翻一番。另一方面，网络可以提供数据的速度正在快速增长，预计在未来几年内将增长数量级。由于网络传输数据的速率和处理器处理数据的速率之间的差距越来越大，单个处理器越来越难以使用当前的协议和计算机体系结构。计算机架构师已经补偿了这样一个事实，即处理器速度不再通过在每个芯片上放置多个处理器核心来增加，并且尽管这些多核系统具有高聚合处理能力，但是要获得通常采用的通信协议的可预测性能需要复杂的手动调整。在以前的工作中，亲和力(智能地将进程绑定到处理器)的概念被用来利用当前和下一代计算机的硬件并行性。该项目将建立在这些先前专业知识的基础上，并利用统计和控制理论方法来管理高速数据流的端到端性能。仔细描述当前技术的过程，然后是分析，最后是中间件工具开发，将对形成最佳实践产生最大影响，同时将对分布式应用程序开发过程的影响降至最低。该项目将描述在不同的分布式科学和商业应用程序中所需的数据传输过程中出现的终端系统瓶颈。所学到的将推动内省终端系统感知模型的开发，这将允许数据传输的自动调整。此调优将同时考虑应用程序的延迟和吞吐量要求。将开发利用多核终端系统并适应终端系统瓶颈的流条带化方法。这将需要解决许多新问题，例如在考虑各种(应用程序、缓存和中断)亲和力的同时将流分配给核心。此外，在控制端到端流时，将考虑缓存的底层拓扑(包括与排除)、内存组织以及核心的异构性。我们将研究内存映射网络通道，例如融合以太网上的远程直接内存访问，以便在广域网上传输数据。为此，将设计、实施和评价内存管理、报文同步和端到端流量控制，以便能够为不同类型的网络流量提供远程信息。从终端系统架构的角度，提出并研究能够显著提高网络I/O性能的缓存架构。广泛的影响：该项目位于计算机网络、计算机系统、操作系统和分布式应用程序的交叉点，将为研究生提供一个分析和实验方法方面的培训平台。本科生的高级设计项目将被定义为与项目密切相关的项目，并涉及分析高速网络试验台中的分布式应用程序。将建立行业伙伴关系，以设计新的协议和优化分布式应用程序的性能，并为下一代联网计算机系统的设计做出贡献。

The rate at which a single processor in a computer can execute instructions has not changed much in years, and major technological breakthroughs will be required to double the current best rates. On the other hand, the rate at which the network can deliver data is increasing rapidly and is expected to grow by an order of magnitude in the next few years. Because of the widening gap between the rate at which the network can deliver data and the rate at which a processor can process the data, it is becoming increasingly difficult for a single processor to keep up using current protocols and computer architectures. Computer architects have compensated for the fact that processor speeds are no longer increasing by putting multiple processor cores on each die, and while these multicore systems have high aggregate processing capacities, attaining predictable performance for the commonly adopted communication protocols requires complex manual tuning. In prior work, the concept of affinity (intelligently binding processes to processors) was leveraged to exploit the hardware parallelism of current and next generation computers. This project will build upon this prior expertise and leverage statistical and control theoretic methods to manage end-to-end performance of high-speed flows. The process of careful characterization of current technology, followed by analysis, and finally middleware tool development will affords the maximum impact on shaping best practices while minimizing any impact on distributed application development processes.This project will characterize the end-system bottlenecks that arise during data transfers required in different distributed scientific and business applications. What is learnt will drive the development of introspective end-system aware models, which will allow the auto-tuning of data transfers. This tuning will consider both latency and throughput requirements of the applications. Flow striping methods that exploit multicore end-systems and adapt to the end-system bottlenecks will be developed. This will require addressing many new issues, such as assigning flows to cores while taking into account various (application, cache, and interrupt) affinities. Additionally, the underlying topology of the cache (inclusive vs. exclusive), the memory organization, and the heterogeneity of the cores will be considered when controlling the end-to-end flows. Memory-mapped network channels, such as Remote Direct Memory Access over Converged Ethernet will be investigated, for data transfers over wide-area networks. Towards this end, memory management, message synchronization and end-to-end flow control to enable remote messaging for different types of network flows will be designed, implemented and evaluated. From the end-system architectural perspective, cache architectures that can significantly improve the network I/O performance will be proposed and investigated.Broader Impacts: This project, which lies at the intersection of computer networks, computer systems, operating systems, and distributed applications, will provide a platform to train graduate students in both analytical and experimental methods. Senior Design projects for undergraduates will be defined that will be closely related to the project and involve profiling distributed applications in high-speed network testbeds. Industry partnerships will be established to design new protocols and optimize the performance of distributed applications, as well as contribute to the design of next generation networked computer system.