CAREER: Transformative Approaches for Hardware Obfuscation Protection, Attacks, and Assessment

职业：硬件混淆保护、攻击和评估的变革性方法

• 批准号: 1651701
• 负责人: Domenic Forte
• 金额: $ 39.99万
• 依托单位: University of Florida
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2017
• 资助国家: 美国
• 起止时间: 2017-06-01 至 2023-05-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1651701&HistoricalAwards=false
• 关键词: CAREER; Transformative; Approaches; Hardware; Obfuscation

Electronic computing hardware forms the foundation of modern information systems and cyber infrastructure. However, the unavoidable involvement of untrusted parties who can insert malicious circuits (i.e., hardware Trojans), steal intellectual property (IP), and produce counterfeits have made hardware more vulnerable to cyber-attacks. National defense, welfare, and economic growth all suffer through 1) weaker security and quality of critical infrastructures; 2) substantial economic and reputational losses for IP owners; 3) increased revenue for terrorist groups, criminals, and adversarial nation states; and 4) lower incentive to innovate and develop new products. The objective of this project is to advance the state-of-the-art in hardware obfuscation for IP protection. Hardware obfuscation refers to transformation of a circuit design into one that is functionally equivalent to the original, but infeasible to reverse engineer and/or obtain unrestricted use without significant effort. This project targets four major limitations associated with existing hardware obfuscation techniques: 1) Impractical overheads for real-world designs; 2) Susceptibility to attacks; 3) Poor scalability to large circuits of practical interest; and 4) lack of metrics and benchmarks in the research community to objectively compare different methods. Efficiency and scalability are being improved by developing novel circuit entropy metrics and holistic obfuscation algorithms that operate on decision diagrams. Outreach activities dedicated to obfuscation and awareness of IP piracy issues include creation of the first publically available benchmarks, conducting online global competitions, and generating new course materials, projects, and book. Through integration of these activities, measureable improvements in the attack resistance of obfuscated combinational and sequential designs are expected by project's end.

电子计算硬件构成了现代信息系统和网络基础设施的基础。然而，不可避免地涉及可以插入恶意电路的不可信方（即，硬件木马），窃取知识产权（IP），并生产假冒产品，使硬件更容易受到网络攻击。国防、福利和经济增长都受到以下因素的影响：1）关键基础设施的安全和质量较弱; 2）知识产权所有者遭受重大经济和声誉损失; 3）恐怖组织、犯罪分子和敌对民族国家的收入增加; 4）创新和开发新产品的动力较低。这个项目的目标是推进最先进的硬件混淆IP保护。硬件混淆是指将电路设计转换为功能上等同于原始设计的电路设计，但不可行进行逆向工程和/或在没有显著努力的情况下获得不受限制的使用。该项目针对与现有硬件混淆技术相关的四个主要限制：1）现实世界设计的不切实际的开销; 2）易受攻击; 3）对实际感兴趣的大型电路的可扩展性差;以及4）研究社区缺乏客观比较不同方法的指标和基准。通过开发新的电路熵度量和在决策图上操作的整体混淆算法，效率和可扩展性正在得到提高。致力于混淆知识产权盗版问题和提高对知识产权盗版问题认识的外联活动包括创建第一个可供参考的基准，举办在线全球竞赛，以及制作新的课程材料、项目和书籍。通过这些活动的整合，预计在项目结束时，混淆组合设计和顺序设计的抗攻击能力将得到可衡量的改善。

项目成果

Sweep to the Secret: A Constant Propagation Attack on Logic Locking

揭秘：对逻辑锁定的持续传播攻击

• 发表时间: 2019
• 期刊: IEEE Asian Hardware Oriented Security and Trust Symposium
• 作者: Alaql, Abdulrahman;Forte, Domenic;Bhunia, Swarup
• 通讯作者: Bhunia, Swarup

CAS-Lock: A Security-Corruptibility Trade-off Resilient Logic Locking Scheme

CAS-Lock：一种安全-腐败权衡弹性逻辑锁定方案

• 发表时间: 2020
• 期刊: IACR transactions on cryptographic hardware and embedded systems
• 作者: Shakya, Bicky;Xu, Xiaolin;Tehranipoor, Mark;Forte, Domenic
• 通讯作者: Forte, Domenic

Defense-in-depth: A recipe for logic locking to prevail

纵深防御：逻辑锁定占上风的秘诀

• DOI: 10.1016/j.vlsi.2019.12.007
• 发表时间: 2020
• 期刊: Integration
• 影响因子: 1.9
• 作者: Rahman, M. Tanjidur;Rahman, M. Sazadur;Wang, Huanyu;Tajik, Shahin;Khalil, Waleed;Farahmandi, Farimah;Forte, Domenic;Asadizanjani, Navid;Tehranipoor, Mark
• 通讯作者: Tehranipoor, Mark

Active IC Metering Protocol Security Revisited and Enhanced with Oblivious Transfer

通过不经意的传输重新审视和增强主动 IC 计量协议安全性

• 发表时间: 2022
• 期刊: SRC TECHCON
• 作者: Roy, S.;Hashemi, M.;Ganji, F.;Forte, D.
• 通讯作者: Forte, D.

Obfuscated Built-In Self-Authentication with Secure and Efficient Wire-Lifting

模糊的内置自我身份验证与安全高效的线提升

• DOI: 10.1109/tcad.2018.2877012
• 发表时间: 2018
• 期刊: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
• 影响因子: 2.9
• 作者: Shi, Qihang;Tehranipoor, Mark M.;Forte, Domenic
• 通讯作者: Forte, Domenic