SaTC: STARSS: Small: iPROBE - An Internal Shielding Approach for Protecting against Frontside and Backside Probing Attacks
SaTC:STARSS:小型:iPROBE - 一种用于防止正面和背面探测攻击的内部屏蔽方法
基本信息
- 批准号:1717392
- 负责人:
- 金额:$ 29.33万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2017
- 资助国家:美国
- 起止时间:2017-08-15 至 2022-07-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
With the proliferation of electronics into every day life, integrated circuits (ICs) process and store more sensitive information than ever before. The extraction of on-chip assets, such as keys, firmware, personal and information, threatens state-of-the-art military technologies, commercial industries, and society alike through counterfeiting, theft, fraud, development of exploits, and much more. Although protection against software and non-invasive methods of extraction has been widely investigated, physical probing has received little attention. In particular, Focused Ion Beam (FIB) is a powerful tool that allows attackers to not only to access and probe assets, but to destroy and/or bypass existing countermeasures. Since FIB capabilities are almost limitless, the best approaches should make probing as costly, time consuming, and frustrating as possible. However, a significant barrier in doing so lies in the fact that the time, effort, and cost to design a FIB-resistant chip must remain reasonable, especially to designers who are not security experts. This project investigates iPROBE, the first ever computer-aided design (CAD) approach aimed at hindering frontside and backside probing attacks on integrated circuits. As a CAD solution, iPROBE relieves the designer's burden by automatically balancing the security and overhead of various countermeasures. Compared to ad hoc countermeasures such as top level meshes, it also allows protection to be concentrated on only the most sensitive portions of a design, thereby lowering cost. iPROBE takes design assets as input, and uses information-theoretic and test-inspired metrics to identify all nets requiring protection. During physical design, nets are ranked in terms of their sensitivity and vulnerability to probing. Internal shields are constructed using existing functional nets as well as additional test nets to surround the highest ranked nets. Cutting through the functional nets ideally renders the chip useless or destroys the sensitive data. Similarly, cutting through test nets can be detected and used to trigger self-destruction. t-private circuits and other countermeasures are integrated with the internal shield to further increase attack complexity. For evaluation, benchmark circuits are implemented with conventional flows and with iPROBE. Area, power, and timing between the two are compared to estimate the iPROBE's impact on performance. Security is evaluated using a custom-built IC probing evaluation tool previously developed by the PIs (with upgrades for backside attack evaluation) and using FIBs in the PIs' lab to execute real attacks on iPROBE-designed chips that are fabricated through MOSIS.
随着电子产品在日常生活中的普及,集成电路(IC)处理和存储的敏感信息比以往任何时候都多。对芯片上资产(如密钥、固件、个人和信息)的提取通过伪造、盗窃、欺诈、开发漏洞等方式威胁着最先进的军事技术、商业行业和社会。虽然针对软件和非侵入性提取方法的保护已被广泛研究,但物理探测很少受到关注。特别是聚焦离子束(FIB)是一种强大的工具,它不仅允许攻击者访问和探测资产,还可以破坏和/或绕过现有的对策。由于FIB的能力几乎是无限的,最好的方法应该使探测尽可能昂贵,耗时和令人沮丧。然而,这样做的一个重要障碍在于,设计抗FIB芯片的时间、精力和成本必须保持合理,特别是对于那些不是安全专家的设计人员。该项目研究iPROBE,这是第一个旨在阻止集成电路正面和背面探测攻击的计算机辅助设计(CAD)方法。作为CAD解决方案,iPROBE通过自动平衡各种对策的安全性和开销,减轻了设计人员的负担。与诸如顶级网格的特定对策相比,它还允许保护仅集中在设计的最敏感部分,从而降低成本。iPROBE将设计资产作为输入,并使用信息理论和测试启发的指标来识别需要保护的所有网络。在物理设计期间,网络根据其对探测的敏感性和脆弱性进行排名。内部屏蔽使用现有的功能网络以及额外的测试网络来构建,以包围排名最高的网络。切断功能网络理想地使芯片无用或破坏敏感数据。同样,切断试验网也可以被探测到并用来触发自毁。T-专用电路和其它对策与内部屏蔽集成以进一步增加攻击复杂性。为了评估,基准电路与传统的流程和iPROBE实现。比较两者之间的面积、功率和时序,以估计iPROBE对性能的影响。安全性的评估使用了PI先前开发的定制IC探测评估工具(升级后用于背面攻击评估),并使用PI实验室中的FIB对通过MOSIS制造的iPROBE设计的芯片执行真实的攻击。
项目成果
期刊论文数量(9)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
Contact-to-Silicide Probing Attacks on Integrated Circuits and Countermeasures
集成电路的接触硅化物探测攻击及对策
- DOI:
- 发表时间:2019
- 期刊:
- 影响因子:0
- 作者:Covic, Ana;Shi, Qihang;Shen, Haoting;Forte, Domenic
- 通讯作者:Forte, Domenic
A Physical Design Flow against Front-side Probing Attacks by Internal Shielding
通过内部屏蔽抵御前端探测攻击的物理设计流程
- DOI:
- 发表时间:2020
- 期刊:
- 影响因子:2.9
- 作者:Wang, Huanyu;Shi, Qihang Shi;Nahiyan, Adib;Forte, Domenic;Tehranipoor, Mark M.
- 通讯作者:Tehranipoor, Mark M.
iPROBE: Internal Shielding Approach for Protecting Against Front-Side and Back-Side Probing Attacks
- DOI:10.1109/tcad.2023.3276525
- 发表时间:2023-12
- 期刊:
- 影响因子:2.9
- 作者:Minyan Gao;M. S. Rahman;Nitin Varshney;M. Tehranipoor;Domenic Forte
- 通讯作者:Minyan Gao;M. S. Rahman;Nitin Varshney;M. Tehranipoor;Domenic Forte
Probing Attacks on Integrated Circuits: Challenges and Research Opportunities
探索对集成电路的攻击:挑战和研究机会
- DOI:10.1109/mdat.2017.2729398
- 发表时间:2017
- 期刊:
- 影响因子:2
- 作者:Wang, Huanyu;Forte, Domenic;Tehranipoor, Mark M.;Shi, Qihang
- 通讯作者:Shi, Qihang
Circuit Masking Schemes: New Hope for Backside Probing Countermeasures?
电路屏蔽方案:背面探测对策的新希望?
- DOI:
- 发表时间:2020
- 期刊:
- 影响因子:0
- 作者:Covic, Ana;Ganji, Fatemeh;Forte, Domenic
- 通讯作者:Forte, Domenic
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Domenic Forte其他文献
Thermal-aware sensor scheduling for distributed estimation
用于分布式估计的热感知传感器调度
- DOI:
- 发表时间:
2010 - 期刊:
- 影响因子:0
- 作者:
Domenic Forte;Ankur Srivastava - 通讯作者:
Ankur Srivastava
EMFORCED: EM-based Fingerprinting Framework for Counterfeit Detection with Demonstration on Remarked and Cloned ICs
EMFORCED:基于 EM 的防伪指纹识别框架,并在标记和克隆 IC 上进行演示
- DOI:
- 发表时间:
2018 - 期刊:
- 影响因子:0
- 作者:
Andrew Stern;Ulbert J. Botero;Bicky Shakya;Haoting Shen;Domenic Forte;M. Tehranipoor - 通讯作者:
M. Tehranipoor
Introduction to Hardware Obfuscation: Motivation, Methods and Evaluation
硬件混淆简介:动机、方法和评估
- DOI:
- 发表时间:
2017 - 期刊:
- 影响因子:0
- 作者:
Bicky Shakya;M. Tehranipoor;S. Bhunia;Domenic Forte - 通讯作者:
Domenic Forte
Design of Accurate Low-Cost On-Chip Structures for Protecting Integrated Circuits Against Recycling
用于保护集成电路免遭回收的精确低成本片上结构设计
- DOI:
10.1109/tvlsi.2015.2466551 - 发表时间:
2016 - 期刊:
- 影响因子:2.8
- 作者:
Ujjwal Guin;Domenic Forte;M. Tehranipoor - 通讯作者:
M. Tehranipoor
Systematic Correlation and Cell Neighborhood Analysis of SRAM PUF for Robust and Unique Key Generation
SRAM PUF 的系统相关性和单元邻域分析,用于稳健且独特的密钥生成
- DOI:
10.1007/s41635-017-0012-3 - 发表时间:
2017 - 期刊:
- 影响因子:0
- 作者:
Md. Tauhidur Rahman;Alison Hosey;Zimu Guo;Jackson Carroll;Domenic Forte;M. Tehranipoor - 通讯作者:
M. Tehranipoor
Domenic Forte的其他文献
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{{ truncateString('Domenic Forte', 18)}}的其他基金
CAMO: Counterfeit Attestation MOdule for Electronics Supply Chain Tracking and Provenance
CAMO:用于电子供应链跟踪和来源的防伪认证模块
- 批准号:
2341895 - 财政年份:2024
- 资助金额:
$ 29.33万 - 项目类别:
Standard Grant
Collaborative Research: SaTC: CORE: Small: ERADICATOR: Techniques for Laser Assisted Side-Channel Attack Monitor & Response
协作研究:SaTC:核心:小型:ERADICATOR:激光辅助侧信道攻击监控技术
- 批准号:
2150122 - 财政年份:2022
- 资助金额:
$ 29.33万 - 项目类别:
Standard Grant
NSF Student Travel Grant for 2020 IEEE International Symposium on Hardware Oriented Security and Trust (HOST): San Jose, CA - May 2020
NSF 学生旅费资助 2020 年 IEEE 国际硬件导向安全与信任研讨会 (HOST):加利福尼亚州圣何塞 - 2020 年 5 月
- 批准号:
2002804 - 财政年份:2019
- 资助金额:
$ 29.33万 - 项目类别:
Standard Grant
CAREER: Transformative Approaches for Hardware Obfuscation Protection, Attacks, and Assessment
职业:硬件混淆保护、攻击和评估的变革性方法
- 批准号:
1651701 - 财政年份:2017
- 资助金额:
$ 29.33万 - 项目类别:
Continuing Grant
Combating Counterfeit Analog and Mixed Signal ICs with Lightweight Embedded Mechanisms and Innovative Electrical Tests
利用轻量级嵌入式机制和创新电气测试打击假冒模拟和混合信号 IC
- 批准号:
1610075 - 财政年份:2016
- 资助金额:
$ 29.33万 - 项目类别:
Standard Grant
SHF: Small: GOALI: Advanced Physical Inspection of Counterfeit Integrated Circuits
SHF:小型:GOALI:假冒集成电路的高级物理检测
- 批准号:
1559772 - 财政年份:2015
- 资助金额:
$ 29.33万 - 项目类别:
Standard Grant
SHF: Small: GOALI: Advanced Physical Inspection of Counterfeit Integrated Circuits
SHF:小型:GOALI:假冒集成电路的高级物理检测
- 批准号:
1423282 - 财政年份:2014
- 资助金额:
$ 29.33万 - 项目类别:
Standard Grant
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