Combating Counterfeit Analog and Mixed Signal ICs with Lightweight Embedded Mechanisms and Innovative Electrical Tests

项目目标简介：以针对性的电气测试和设计结构为中心，建立一个检测和避免模拟和混合信号假冒ic的综合框架。摘要：全球化导致整个供应链中各种类型的假冒电子元件报告大幅增加。除了知识产权侵权造成的数十亿美元损失外，假冒部件通常质量不合格，从而给包含它们的关键系统和基础设施带来风险。在集成电路（ic）中，模拟和混合信号（AMS） ic是伪造的最佳目标，因为它们的产品生命周期长，利润率高，在主要市场（工业，汽车，智能，消费，无线，计算等）的流行，较低的复杂性，以及(v)易于逆向工程和克隆旧的工艺技术节点。鉴于大量系统和部门使用AMS电子产品，假冒产品对主要组件制造商，原始设备制造商，政府和社会产生重大影响。虽然现有的基于物理检查和电气测试的防伪方法可应用于AMS集成电路，但这些方法耗时且具有破坏性，并且通常需要黄金（已知的真品）信息。此外，已经开发了新的设计技术来检测假冒数字ic，但由于模拟和数字设计之间的根本差异，这些技术并不适合AMS ic。技术摘要：本项目首次探索了一个整体框架来检测和防止所有类型的模拟和混合信号（AMS）伪造ic。实现这一目标的基本挑战包括缺乏老化模型（需要检测回收/使用的IC），缺乏数字IC功能（例如，测试结构，传统加密模块等），以及AMS IC严格的资源限制。在这项工作中，通过开发用于检测回收和评论ic的创新电气测试，以及开发用于检测/预防克隆、过度生产和回收ic的轻量级嵌入式机制，解决了这些挑战。为了消除对黄金信息的需求，并保持适用于广泛的IC，电气测试的目标是一般电源管理电路的行为差异，这在许多大型模拟，混合信号和数字IC中都是可以访问的，例如低掉差稳压器（ldo）。无源IC伪造检测的嵌入式机制是基于完全模拟物理不可克隆功能（puf）和新的回收老化传感器开发的。虽然现有的机制需要数字控制逻辑和额外的引脚来访问PUF和传感器输出，但开发了新的低成本接口，使所有提出的方法更容易采用。对于主动预防，混沌加密（可以在模拟IC中实现）被用于新颖的IC锁定解锁机制，以防止过量生产的IC进入市场。所有的方法都将在模拟和硅中进行测试。PI的实验室将从行业合作伙伴那里获得正品ic，并对其进行防伪测试。嵌入式机制将集成到测试ic中，并使用标准CMOS工艺制造以进行验证。

Proposal Title: Combating Counterfeit Analog and Mixed Signal ICs with Lightweight Embedded Mechanisms and Innovative Electrical Tests Brief description of project Goals: A comprehensive framework for detecting and avoiding analog and mixed signal counterfeit ICs centered on targeted electrical tests and design structures.Nontechnical Abstract:Globalization has resulted in a substantial rise in all types of counterfeit electronic components reported throughout the supply chain. Aside from the billions lost from IP infringement, counterfeit parts are often of substandard quality, thereby creating risks for the critical systems and infrastructures that incorporate them. Among integrated circuits (ICs), analog and mixed signal (AMS) ICs are the best targets for counterfeiting due to their long product life cycles, high profit margins, prevalence across major markets (industrial, automotive, intelligence, consumer, wireless, compute, etc.), lower complexity, and (v) ease of reverse engineering and cloning older process technology nodes. Given the large number of systems and sectors using AMS electronics, counterfeits have significant impacts on major component manufacturers, original equipment manufacturers, governments, and society. While there exist counterfeit detection approaches based on physical inspection and electrical tests that could be applied to AMS ICs, they are time consuming, destructive, and often require golden (known authentic) information. In addition, new design techniques have been developed to detect counterfeit digital ICs, but these are not well-suited for AMS ICs due to the fundamental differences between analog and digital design. Technical Abstract:This project explores, for the first time, a holistic framework to detect and prevent all types of analog and mixed-signal (AMS) counterfeit ICs. Fundamental challenges to this goal include lack of aging models (needed to detect recycled/used ICs), lack of digital IC features (e.g., test structures, traditional cryptographic modules, etc.), and strict resource constraints of AMS ICs. In this work, these challenges are addressed through the development of innovative electrical tests for detecting recycled and remarked ICs as well as development of lightweight embedded mechanisms for detection/prevention of cloned, overproduced, and recycled ICs. To eliminate the need for golden information and remain applicable to a wide range of ICs, the electrical tests target differences in behavior of general power management circuitry, which are accessible in many large analog, mixed signal, and digital ICs, such as Low Drop-Out Regulators (LDOs) Embedded mechanisms for passive IC counterfeit detection are developed based on fully analog physically unclonable functions (PUFs) and new recycling\aging sensors. While existing mechanisms require digital control logic and an additional pin for access to PUF and sensor output, new low cost-interfaces are developed to make all the proposed approaches easier to adopt. For active prevention, chaotic cryptography (which can be implemented in analog ICs) is exploited for novel IC locking\unlocking mechanisms that prevent overproduced ICs from entering the market. All approaches will be tested in simulation and silicon. Authentic ICs will be acquired and tested against counterfeits available in the PI's lab from industry collaborators. The embedded mechanisms will be incorporated into test ICs and fabricated using standard CMOS processes for validation.