SBIR Phase II: Thin crystalline technologies for advanced power transistors

SBIR 第二阶段：先进功率晶体管的薄晶技术

• 批准号: 1660078
• 负责人: leo mathew
• 金额: $ 75万
• 依托单位: applied novel devices
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2017
• 资助国家: 美国
• 起止时间: 2017-04-01 至 2020-05-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1660078&HistoricalAwards=false
• 关键词: SBIR; Phase; II; Thin; crystalline

This Small Business Innovation Research (SBIR) Phase II project seeks to de-risk the volume manufacturability and reliability of thin crystalline power MOSFETs fabricated with a novel exfoliation technology demonstrated in Phase 1. The broader impact/commercial potential of this project is to enable lower cost and better performance for power devices in switching or transferring electricity under varying power requirements across the voltage spectrum in a variety of applications ranging from consumer, to communications, automotive and industrial applications. In all of these applications, the ON resistance of the power MOSFET and IGBTs can be reduced and the switching speed and performance further improved by reducing the device thickness. Additionally, in consumer and mobile applications, reducing the form factor of the power MOSFET devices can enable slimmer and lighter products. A significant broader impact of this technology will be the reduction of expensive and environmentally hazardous waste treatment processes associated with wafer grinding technology used in the power MOSFET industry. While the power MOSFETs developed using this technology can have broad commercial and societal impact, the use of this thin crystalline technology can have even broader impact across all modern semiconductor devices such as LED, PV, flexible CMOS and passive devices.This Small Business Innovation Research (SBIR) Phase I project addresses challenges to further scaling of Power MOSFETs which are one of the key building blocks of the electronic revolution over the last few decades. While the feature size of transistors has been constantly shrinking, the substrate thickness has been increasing. These substrates are currently mechanically thinned to minimize the negative impact of this increased thickness on performance and form-factor. There are significant challenges to continue this trend and the thin crystalline technology and device architecture proposed here can enable continued scaling of device metrics over the next decade with favorable cost structures. During phase I, functional power MOSFETs were demonstrated with this thin crystalline technology to establish the feasibility of this technology for power devices. This phase II effort will focus on the following specific technical challenges to bring it to market. (1) Develop power MOSFETs with improved switching characteristics using the thin crystalline technology (2) High voltage high current characterization of the thin crystalline power MOSFETs (3) Process yield and reliability characterization of package thin crystalline power MOSFET parts and (4) Convert existing process line to use thin crystalline exfoliation technology in high volume manufacturing flow.

这一小型企业创新研究（SBIR）第二阶段项目旨在降低采用第一阶段展示的新型剥离技术制造的薄晶体功率MOSFET的批量可制造性和可靠性风险。 该项目更广泛的影响/商业潜力是在从消费者到通信、汽车和工业应用的各种应用中，在电压频谱上的不同功率要求下，使功率器件在开关或传输电力时实现更低的成本和更好的性能。 在所有这些应用中，功率MOSFET和IGBT的导通电阻都可以通过减小器件厚度来降低，开关速度和性能也可以进一步提高。 此外，在消费和移动的应用中，减小功率MOSFET器件的外形尺寸可以实现更轻薄的产品。 该技术的一个显著的更广泛的影响将是减少与功率MOSFET行业中使用的晶片研磨技术相关的昂贵和对环境有害的废物处理过程。 虽然使用这种技术开发的功率MOSFET可以产生广泛的商业和社会影响，但这种薄晶体技术的使用可以对所有现代半导体器件产生更广泛的影响，例如LED，PV，灵活的CMOS和无源器件。这项小型企业创新研究（SBIR）第一阶段项目解决了进一步扩展功率MOSFET的挑战，功率MOSFET是过去几年电子革命的关键组成部分之一。几十年虽然晶体管的特征尺寸一直在不断缩小，但衬底厚度一直在增加。这些基板目前被机械地减薄以最小化这种增加的厚度对性能和形状因数的负面影响。继续这一趋势存在重大挑战，本文提出的薄晶体技术和器件架构可以在未来十年内以有利的成本结构实现器件指标的持续扩展。 在第一阶段，我们展示了采用这种薄晶体技术的功能功率MOSFET，以确定该技术用于功率器件的可行性。第二阶段的工作将侧重于将其推向市场的以下具体技术挑战。(1)利用薄晶体技术开发具有改进的开关特性的功率MOSFET（2）薄晶体功率MOSFET的高电压高电流特性（3）封装薄晶体功率MOSFET部件的工艺良率和可靠性特性以及（4）转换现有工艺线以在大批量生产流程中使用薄晶体剥离技术。