PFI:AIR-TT: Prototype Development of Recipe Optimization for Deposition and Etching (RODEo)

这个PFI:AIR技术翻译项目的重点是将等离子蚀刻和工艺优化的研究代码翻译成一个用户友好的工业验证软件工具。这将使配方开发成本降低65%以上，并缩短半导体工具和芯片制造商产品的上市时间。一个半导体芯片需要50多个蚀刻步骤。这些蚀刻步骤中的每一个都是一个独特的化学过程，需要精确的工艺条件或配方（例如，压力，温度，化学成分和数量，以及蚀刻或沉积工具中的时间）。该项目的潜在专利申请方法和软件实施，即沉积和蚀刻配方优化（RODEo），使用动力学过程模型和统计分析，与目前的工业标准相比，将工艺开发的时间和成本减少了三倍。每年用于蚀刻和沉积工艺开发的费用超过12亿美元。随着新技术和更小的特征需要新材料和更多的蚀刻和沉积步骤，这一成本预计将增长。通过将制作配方所需的实验次数减少三倍，RODEo可以减少8亿美元的成本。基于等离子体的半导体工艺的开发非常昂贵和耗时，严重减缓了技术的发展，限制了半导体设备和芯片的销售。该项目解决了这一技术差距，因为它将RODEo方法从研究发现转化为商业应用。RODEo使用贝叶斯统计来独特地结合基于物理的模型和实验，以及蚀刻工程师的专家或所谓的部落知识，以加速配方开发的过程。研究代码的商业翻译需要创建的元素包括：1)与现有等离子体模型耦合的三维轮廓模拟器；2)蚀刻化学模型和动力学参数数据库，便于使用；3)优化代码，提高计算速度；4)用户界面；5) RODEo配方开发的工业演示，用于高纵横比沟槽蚀刻的侧壁控制，对比我们的一个工业合作伙伴使用的方法。此外，参与该项目的人员，包括本科生、研究生和博士后，将通过我们的合作伙伴和未来客户（包括Lam Research、英特尔和东京电子）的互动和用户反馈，获得技术翻译的经验。该项目由工业创新与伙伴关系部和工程教育与中心部联合资助；反映了这个项目与两个部门的各自目标及其计划的一致性。

This PFI:AIR Technology Translation project focuses on translating a research code for plasma etch and process optimization into a user-friendly industrially validated software tool. This will reduce the costs of recipe development by over 65% and shorten time to market for the products of semiconductor tool and chip makers. A single semiconductor chip requires over 50 etching steps. Each of these etch steps is a unique chemical process that requires specifications of an exact process condition or recipe (e.g., pressure, temperature, chemical ingredients and amounts, and time in the etch or deposition tool). The underlying patent-pending methodology and software implementation for this project, Recipe Optimization for Deposition and Etching (RODEo), uses kinetic process models and statistical analysis to reduce the time and cost of process development by a factor of three as compared with current industrial standards. Greater than $1.2B is spent on etch and deposition process development per year. This cost is projected to grow as new technologies and smaller features require new materials and greater numbers of etch and deposition steps. By reducing the number of experiments necessary to create a recipe by a factor of three, RODEo can reduce this by $800M. Development of plasma-based semiconductor processes is extremely costly and time consuming, severely slowing technology growth and constraining semiconductor equipment and chip sales. This project addresses this technology gap as it translates the RODEo methodology from research discovery toward commercial application. RODEo uses Bayesian statistics to uniquely combine the physics-based models and experiments and the expert or so-called tribal knowledge of etch engineers to accelerate the process of recipe development. Elements to be created for commercial translation of the research code include: 1) 3D profile simulator to couple with the existing plasma model; 2) Database of etch chemistry models and kinetic parameters for ease of use; 3) Optimized code for increased computational speed; 4) User interface; and 5) Industry demo of RODEo recipe development for sidewall control for etch of a high aspect ratio trench, against methods used by one of our industrial partners. In addition, personnel involved in this project, including undergraduate, graduate and post-doctoral students, will receive experiences in technology translation through interactions and user feedback from our partners and future customers, which include Lam Research, Intel, and Tokyo Electron.This project is jointly funded by the Division of Industrial Innovation and Partnerships and the Division of Engineering Education and Centers; reflecting the alignment of this project with the respective goals of the two divisions and their programs.