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CAREER: Parameter Obfuscation: A Novel Methodology for the Protection of Analog Intellectual Property

CAREER: Parameter Obfuscation: A Novel Methodology for the Protection of Analog Intellectual Property
职业:参数混淆:保护模拟知识产权的新方法
批准号:
1751032
负责人:
Ioannis Savidis
金额:
$50.37万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2018
资助国家:
美国
项目状态:
未结题
起止时间:
2018-04-15 至 2025-03-31

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中文摘要
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英文摘要
Hardware security, specifically the protection of integrated circuit intellectual property (IP), has gained importance as adversaries have the financial and experiential means to reverse engineer and replicate competitors' IP. Significant research effort has been devoted to protecting digital circuits, but the protection of analog circuits from an adversary has largely been ignored. The focus of this work is to explore techniques to enhance the security of analog circuits from attacks such as reverse engineering and cloning, both of which can lead to IP theft. Analog parameter obfuscation is proposed as a means to protect analog circuits from adversarial theft. The large design space for analog parameter obfuscation, which includes biasing conditions, gains, bandwidths, noise figure, quality factors, center frequency, phase noise, and many more, provides a means to mask analog circuit functionality beyond the simple binary functional logic locking that has been developed for digital circuits. To enhance the security of analog circuits from reverse engineering, the proposed research includes 1) the development of novel parameter-based obfuscation techniques for analog circuits, 2) the development of algorithms and methodologies to select and prune analog circuit parameters (gain, biasing points, bandwidth, noise figure, quality factor, phase noise, etc.) best suited for obfuscation, 3) the development of initial metrics for the evaluation of parameter obfuscation techniques, and 4) the implementation of the obfuscation technique on a superheterodyne receiver for experimental verification and algorithm refinement. The fundamental outcome is to develop a systematic approach to analyze and obfuscate analog circuit parameters that are multi-dimensional and continuous by nature. The research results will be used to expose high school students to engineering topics through presentations and hands-on workshops. In addition, high school students will be mentored in research through an outreach program, initiated and led by the investigator, which pairs students with faculty mentors. The data generated from the project will be maintained online on a server at Drexel University (http://ice.ece.drexel.edu) - with the exception of publications, for which copyright is transferred to a professional organization (such as IEEE or ACM) and which maintain their own repository. At the completion of the project, all data and code will be released in the public domain and maintained in the repository for at least the required period set by agency and university guidelines.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
期刊论文(9)
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科研奖励(0)
会议论文
DOI: 10.1145/3380446.3430633
发表时间: 2020-11
期刊: 2020 ACM/IEEE 2nd Workshop on Machine Learning for CAD (MLCAD)
影响因子: --
作者: [Zhengfeng Wu;I. Savidis]
通讯作者: Zhengfeng Wu;I. Savidis
Mesh Based Obfuscation of Analog Circuit Properties
基于网格的模拟电路属性混淆
DOI: 10.1109/iscas.2019.8702671
发表时间: 2019
期刊: 2019 IEEE International Symposium on Circuits and Systems (ISCAS
影响因子: --
作者: [Rao, Vaibhav Venugopal, Savidis, Ioannis]
通讯作者: Savidis, Ioannis
Performance and Security Analysis of Parameter-Obfuscated Analog Circuits
参数混淆模拟电路的性能和安全性分析
DOI: 10.1109/tvlsi.2021.3109062
发表时间: 2021
期刊: IEEE Transactions on Very Large Scale Integration (VLSI
影响因子: --
作者: [Venugopal Rao, Vaibhav, Savidis, Ioannis]
通讯作者: Savidis, Ioannis
Security Vulnerabilities of Obfuscated Analog Circuits
混淆模拟电路的安全漏洞
DOI: 10.1109/iscas45731.2020.9180781
发表时间: 2020
期刊: Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS
影响因子: --
作者: [Rao, Vaibhav Venugopal, Juretus, Kyle, Savidis, Ioannis]
通讯作者: Savidis, Ioannis
9
    EAGER: Securing Integrated Circuits Through Realtime Hardware Trojan Detection
    • 批准号:
      1648878
    • 项目类别:
      Standard Grant
    • 资助金额:
      $28.87万
    • 财政年份:
      2016
    • 负责人:
      Ioannis Savidis
    • 依托单位:
    海外基金