SHF: Small: Using Software Defined Cache to Accelerate Index Search for In-memory Applications: Software and Hardware Approaches

内存是大型数据中心中最重要的组件之一。由于许多用于大数据处理的软件系统将其数据集完全保存在内存中以实现高性能内存计算，因此内存效率对应用程序性能至关重要。虽然应用程序，如数据库系统和大数据分析，通常作为信息处理的基础设施，并为我们社会中的数百万人提供IT服务，但通过优化存储器访问来提高其性能具有非常重要的意义和影响。由于与处理器和缓存速度相比，内存访问速度较慢，因此该项目通过重新设计的缓存架构消除了不必要的内存访问，支持灵活的访问和高效的管理。此外，该项目为本科生和研究生，特别是代表性不足的少数民族学生提供研究培训，使他们成为未来的信息技术专业人员，在计算机架构和系统领域拥有强大的技能。 在内存密集型计算中，很大一部分内存访问花费在索引上，用于将用户定义的键转换为内存地址以进行数据访问。然而，由于缺乏时间和空间的地方，它可以是非常困难的缓存索引和接收高缓存命中率。因此，索引的搜索通常以存储器速度进行，并且搜索数据项可能需要多次存储器访问。这个项目设计了一个软件定义的高速缓存--一种对处理器高速缓存的知情使用，其中用户程序可以显式地指定数据项，以便用它们定义的键进行高速缓存。作为一个两阶段的努力，该项目采用了软件的方法，其中它是作为一个用户级库管理的后备缓冲区隐式映射到该高速缓存，和硬件的方法，其中键显式散列到该高速缓存。这两种方法都能很好地利用访问局部性，以该高速缓存的速度执行索引搜索，各有其独特的优点。该奖项反映了NSF的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

Memory is one of the most important components in large-scale data centers. As many software systems for big data processing keep their data sets entirely in memory to enable high-performance in-memory computing, memory efficiency becomes critical to application performance. While the applications, such as database systems and big data analytics, often serve as an infrastructure for information processing and providing IT services for millions of people in our society, improvement of their performance via optimization of the memory access is of great importance and impact. As memory access is slow compared with processor and cache speeds, the project eliminates unnecessary memory accesses with a re-designed cache architecture supporting flexible access and efficient management. In addition, this project provides research training to both undergraduate and graduate students, especially under-represented minority students, to prepare them to be future information technology professionals with strong skills in computer architecture and system areas. In memory-intensive computing, a significant percentage of memory access is spent on indices for translating user-defined keys into memory addresses for data accessing. However, due to lack of temporal and spatial localities, it can be very difficult to cache the indices and receive high cache-hit ratio. Accordingly, searching of the indexes is often at the memory speed, and searching for a data item may require multiple memory accesses. This project designs a software-defined cache -- an informed use of processor cache where a user program can explicitly specify data items for caching with their defined keys. As a two-phase effort, the project adopts a software approach, in which it is presented as a user-level library managing a look-aside buffer implicitly mapped into the cache, and a hardware approach, in which keys are explicitly hashed into the cache. Both approaches well exploit access locality and perform index search at the cache speed with their respective unique advantages. Accordingly, performance of memory system and memory-intensive applications can be significantly improved.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.