SHF: Small: Using Software Defined Cache to Accelerate Index Search for In-memory Applications: Software and Hardware Approaches

内存是大型数据中心中最重要的组件之一。由于许多用于大数据处理的软件系统将其数据集完全保存在内存中以实现高性能的内存计算，因此内存效率对应用程序性能至关重要。数据库系统和大数据分析等应用程序通常作为信息处理的基础设施，为社会上数百万人提供IT服务，通过优化内存访问来提高其性能具有重要意义和影响。由于与处理器和缓存速度相比，内存访问速度较慢，因此该项目通过重新设计的缓存架构消除了不必要的内存访问，支持灵活的访问和高效的管理。此外，本计划亦为本科生及研究生，特别是少数族裔学生，提供研究训练，以培养他们在电脑架构及系统方面具备较强技能的资讯科技专业人才。在内存密集型计算中，用于将用户定义键转换为内存地址以进行数据访问的索引花费了相当大比例的内存访问。然而，由于缺乏时间和空间位置，很难缓存索引并获得高缓存命中率。因此，索引的搜索通常以内存速度进行，并且搜索数据项可能需要多次内存访问。这个项目设计了一个软件定义的缓存——处理器缓存的一种明智的使用，用户程序可以显式地指定数据项，用它们定义的键进行缓存。作为一个两阶段的工作，该项目采用了一种软件方法，其中它作为一个用户级库来管理一个隐式映射到缓存中的暂存缓冲区，而采用了一种硬件方法，其中键显式地散列到缓存中。这两种方法都很好地利用了访问局部性，并以各自独特的优势在缓存速度下执行索引搜索。因此，可以显著提高内存系统和内存密集型应用程序的性能。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

Memory is one of the most important components in large-scale data centers. As many software systems for big data processing keep their data sets entirely in memory to enable high-performance in-memory computing, memory efficiency becomes critical to application performance. While the applications, such as database systems and big data analytics, often serve as an infrastructure for information processing and providing IT services for millions of people in our society, improvement of their performance via optimization of the memory access is of great importance and impact. As memory access is slow compared with processor and cache speeds, the project eliminates unnecessary memory accesses with a re-designed cache architecture supporting flexible access and efficient management. In addition, this project provides research training to both undergraduate and graduate students, especially under-represented minority students, to prepare them to be future information technology professionals with strong skills in computer architecture and system areas. In memory-intensive computing, a significant percentage of memory access is spent on indices for translating user-defined keys into memory addresses for data accessing. However, due to lack of temporal and spatial localities, it can be very difficult to cache the indices and receive high cache-hit ratio. Accordingly, searching of the indexes is often at the memory speed, and searching for a data item may require multiple memory accesses. This project designs a software-defined cache -- an informed use of processor cache where a user program can explicitly specify data items for caching with their defined keys. As a two-phase effort, the project adopts a software approach, in which it is presented as a user-level library managing a look-aside buffer implicitly mapped into the cache, and a hardware approach, in which keys are explicitly hashed into the cache. Both approaches well exploit access locality and perform index search at the cache speed with their respective unique advantages. Accordingly, performance of memory system and memory-intensive applications can be significantly improved.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.