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SBIR Phase II: Next Generation High Performance EUV Photomasks.

SBIR Phase II: Next Generation High Performance EUV Photomasks.
SBIR 第二阶段:下一代高性能 EUV 光掩模。
批准号:
1927546
负责人:
Supriya Jaiswal
金额:
$75.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2019
资助国家:
美国
项目状态:
已结题
起止时间:
2019-10-01 至 2023-09-30

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中文摘要
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英文摘要
The broader impact/commercial potential of this Small Business Innovation Research (SBIR) Phase II project is to drive the next generation of advanced computing power and performance by manufacturing integrated circuits (ICs) at 7 nm and smaller. Today's central processing units (CPUs) contain 7.2 B chips and over 1.2 sextillion chips are manufactured per year. Next generation technology is expected to enable artificial intelligence and machine learning through both conventional computing and potentially new paradigms for transformative applications such as self-driving cars and smart buildings, but new ways are needed to make appropriate chips. The proposed project will develop a technology to address this need as chipmakers meet their desired goals. The proposed project addresses challenges related to high volume manufacturing at the 7 nm node for lithography tools and their components. An EUV photomask, a high commodity component, patterns and replicates integrated circuit design into silicon wafers. Current EUV photomasks have a sub-optimal manufacturing yield of ~65% and suffer from defectivity during fabrication of its architecture. During operational use the photomask sustains damage from the debris generated by the EUV plasma light source that implants in the mask and inevitably replicates in the wafer, destroying the integrated chip pattern. In high volume manufacturing, these issues manifest in the wafer yield, the reusability of a mask, and drive the need for high cost real-time inspection and metrology. We propose a new EUV photomask which promises a higher robustness to defects, a higher manufacturing yield, better uniformity and more reusability of masks in operations and longer lifetime. The goals of the project are to evaluate new integrated architecture for the EUV mask design, develop a higher yield fabrication process and characterize their EUV performance. More robust architectures reduce capital outlay requirements for in-situ metrology and inspection and ultimately bring down the cost of next generation electronics.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
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  • 项目类别:
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