Collaborative Research: SHF: Small: Optimization of Memory Architectures: A Foundation Approach

合作研究：SHF：小型：内存架构优化：基础方法

• 批准号: 2008907
• 负责人: Xian-He Sun
• 金额: $ 22.5万
• 依托单位: Illinois Institute of Technology
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2020
• 资助国家: 美国
• 起止时间: 2020-07-01 至 2024-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2008907&HistoricalAwards=false
• 关键词: Collaborative; Research; SHF; Small; Optimization

This project proposes a foundational approach to model-driven performance optimization of memory systems for modern computer architectures, with the development of a set of memory-architecture optimization methods and tools that are theoretically proven and empirically feasible for modern memory architecture design. The outcome of this project will significantly improve the performance modeling and optimization techniques for designing and evaluating memory architectures in modern computer systems, featuring deep and diverse memory-system hierarchies, heterogeneous memory devices, and complex data-intensive applications, including big-data, cloud and data centers and high-performance computing applications. The findings of this project will improve the content of various courses that the PIs teach. This project plans to proactively recruit minority students by taking advantage of the institutional efforts at IIT and especially at FIU, which is a minority-serving institution. This project will align education and outreach activities with an existing research and education center.The growing disparity between CPU and memory speed causes memory accesses to become a severe performance bottleneck in modern computer architectures. Attempts to solving this “memory wall” problem underpin technological innovations in computer-architecture design over the last two and half decades. The objective of the research is to significantly extend prior memory models and create a practical memory-architecture performance-modeling and optimization framework that can capture the combined effects of data locality, data concurrency, access latency, and multi-tier memory architecture for real applications and on real systems. A simulation-driven approach will be developed with elaborate real-system measurements and performance analyses to examine the potential benefits and identify the performance issues of various memory-architecture designs. More specifically, this project will develop along three research directions: (1) developing theoretical and architectural foundations to address both fundamental questions related to the tiered heterogeneous memory architectures and investigate practical aspects of applying the modeling and optimization framework for various memory architectures; (2) performing model-driven memory-architecture design and optimization for specific memory architectures, including disaggregated memory system, GPU, and deep-memory hierarchy with hybrid memory devices including non-volatile memory; and (3) developing the memory architecture simulator embedded with the performance modeling and optimization framework, and conducting simulation studies and real system measurements to evaluate memory performance, and compare design alternatives and trade-offs.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

该项目提出了一种基于模型驱动的现代计算机体系结构存储系统性能优化的基本方法，开发了一套存储体系结构优化方法和工具，这些方法和工具在理论上得到了证明，并在经验上对现代存储体系结构设计是可行的。该项目的成果将显著改进现代计算机系统中设计和评估内存体系结构的性能建模和优化技术，这些体系结构具有深度和多样性的内存系统层次结构、不同的内存设备以及复杂的数据密集型应用程序，包括大数据、云和数据中心以及高性能计算应用程序。这一项目的结果将改进PIS教授的各种课程的内容。该项目计划利用IIT的机构努力，特别是FIU这一为少数群体服务的机构，积极主动地招收少数群体学生。该项目将使教育和推广活动与现有的研究和教育中心保持一致。CPU和内存速度之间日益扩大的差距导致内存访问成为现代计算机体系结构中的严重性能瓶颈。在过去的25年里，解决这个“记忆墙”问题的尝试支撑了计算机体系结构设计中的技术创新。该研究的目标是显著扩展现有的内存模型，并创建一个实用的内存体系结构性能建模和优化框架，该框架可以为实际应用程序和实际系统捕获数据局部性、数据并发性、访问延迟和多层内存体系结构的综合影响。将开发一种模拟驱动的方法，通过详细的真实系统测量和性能分析来检查各种存储器体系结构设计的潜在好处和确定性能问题。更具体地说，本项目将沿着三个研究方向发展：(1)开发理论和体系结构基础，以解决与分层异质存储体系结构相关的基本问题，并研究在各种存储体系结构中应用建模和优化框架的实际方面；(2)针对特定的存储体系结构，包括分散存储系统、GPU和具有包括非易失性存储器在内的混合存储器件的深层存储层次结构，进行模型驱动的存储体系结构设计和优化；以及(3)开发嵌入性能建模和优化框架的内存架构模拟器，并进行仿真研究和实际系统测量，以评估内存性能，并比较设计备选方案和权衡。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

项目成果

Accelerating Graph Processing With Lightweight Learning-Based Data Reordering

通过基于轻量级学习的数据重新排序加速图形处理

• DOI: 10.1109/lca.2022.3151087
• 发表时间: 2022
• 期刊: IEEE Computer Architecture Letters
• 影响因子: 2.3
• 作者: Zou, Mo;Zhang, Mingzhe;Wang, Rujia;Sun, Xian-He;Ye, Xiaochun;Fan, Dongrui;Tang, Zhimin
• 通讯作者: Tang, Zhimin

Premier: A Concurrency-Aware Pseudo-Partitioning Framework for Shared Last-Level Cache

Premier：用于共享末级缓存的并发感知伪分区框架

• DOI: 10.1109/iccd53106.2021.00068
• 发表时间: 2021
• 期刊: IEEE 39th International Conference on Computer Design (ICCD
• 作者: Lu, Xiaoyang;Wang, Rujia;Sun, Xian-He
• 通讯作者: Sun, Xian-He

Performance Modeling and Evaluation of a Production Disaggregated Memory System

• DOI: 10.1145/3422575.3422795
• 发表时间: 2020-09
• 期刊: Proceedings of the International Symposium on Memory Systems
• 作者: Ning Zhang;Xian-He Sun

A Generalized Model for Modern Hierarchical Memory System

• DOI: 10.1109/wsc57314.2022.10015298
• 发表时间: 2022-12
• 期刊: 2022 Winter Simulation Conference (WSC)
• 作者: Hamed Najafi;Jason Liu;Xiaoyang Lu;Xian-He Sun

CoPIM: A Concurrency-aware PIM Workload Offloading Architecture for Graph Applications

• DOI: 10.1109/islped52811.2021.9502483
• 发表时间: 2021-07
• 期刊: 2021 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)
• 作者: Liang Yan;Mingzhe Zhang;Rujia Wang;Xiaoming Chen;Xingqi Zou;Xiaoyang Lu;Yinhe Han;Xian-He Sun