FET: Medium: A Hybrid Co-processing Unit (HCU) using Phase-change Photonics in CMOS for Large-scale and Ultra-fast Machine Learning Acceleration

点击翻译按钮获取中文摘要

A new wave of technological revolution — ignited by recent developments in artificial intelligence (AI) and machine learning (ML) based on neural networks — is transforming life in numerous ways. The implementation of large-scale artificial neural networks, however, challenges conventional computing paradigms and hardware platforms by demanding enormous computing power at a much faster pace than Moore’s law supports. Optical neural networks (ONNs) have long been proposed as a promising alternative by providing ultra-fast and energy-efficient computing utilizing the distinct advantages of light as opposed to electricity. However, current approaches lack the efficiency, scalability, and programmability that is needed for real-world AI applications. More importantly, such optical processing units will be only practical if they can be seamlessly and efficiently integrated with existing CMOS-based high-performance processors such as CPU/GPUs. Without such scalability and integration, the energy, speed, and latency benefits of ONNs would be compromised by the need for data and model movement in/out of the optical processor. The goal of this project is to develop a hybrid co-processor unit (HCU) to solve these challenges and demonstrate a large-scale, fully integrated ONN suitable for large-scale AI/ML computations. The societal impact of AI cloud systems with sustainable energy consumption and computing power that are afforded by this research will be tremendous. Education and outreach activities of this program include course development in optical computing and AI hardware design, as well as K-12 science outreach programs with publicly accessible online courses.The HCU is being realized through the monolithic integration of emerging phase-change material (PCM) with an advanced silicon photonic process. This strategy allows thousands of photonic elements and millions of transistors to be fabricated together in a single CMOS process in a cost-effective and scalable manner. Additionally, the proposed HCU can be heterogeneously co-packaged with a CPU/GPU to minimize the energy and latency overhead of data/model movement. This project aims to combine the complementary strengths of photonics and electronics for AI/ML acceleration: photonics for high-speed and energy-efficient computation of linear operations using a non-volatile cross-bar network, and electronics for nonlinear high-precision activations and control circuitry. The energy and areal computing density of the HCU will be over an order of magnitude larger than today’s GPUs. The development of HCUs is also timely as optical interconnect has already been penetrating deeper into datacenters and supercomputers toward inter-chip connections. In addition to cloud-base AI/ML, the proposed HCU has tremendous advantages for latency- and power-sensitive applications such as autonomous vehicles, robotics, space missions, and defense operations.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.